Re: [Xen-devel] [PATCH] x86/VT-x: Disable MSR intercept for SHADOW_GS_BASE.

["Nakajima, Jun" <jun.nakajima@xxxxxxxxx>]

On Thu, Nov 14, 2013 at 8:01 AM, Tim Deegan <tim@xxxxxxx> wrote:

At 14:02 +0000 on 14 Nov (1384434176), Andrew Cooper wrote:
> Intercepting this MSR is pointless - The swapgs instruction does not cause a
> vmexit, so the cached result of this is potentially stale after the next guest
> instruction.  It is correctly saved and restored on vcpu context switch.
>
> Furthermore, 64bit Windows writes to this MSR on every thread context switch,
> so interception causes a substantial performance hit.
>
> From: Paul Durrant <paul.durrant@xxxxxxxxxx>
> Signed-off-by: Paul Durrant <paul.durrant@xxxxxxxxxx>
> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

Reviewed-by: Tim Deegan <tim@xxxxxxx>

Acked-by: Jun Nakajima <jun.nakajima@xxxxxxxxx>

--

Jun

Intel Open Source Technology Center

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