Re: [Xen-devel] [PATCH 3/5] X86: MPX IA32_BNDCFGS msr handle

["Liu, Jinsong" <jinsong.liu@xxxxxxxxx>]

Jan Beulich wrote:
>>>> On 22.11.13 at 17:33, "Liu, Jinsong" <jinsong.liu@xxxxxxxxx> wrote:
>> Jan Beulich wrote:
>>>>>> On 21.11.13 at 16:30, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
>>>>>> wrote:
>>>> On 19/11/13 10:51, Liu, Jinsong wrote:
>>>>> @@ -955,6 +956,9 @@ static int construct_vmcs(struct vcpu *v)
>>>>>          vmx_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_EIP,
>>>>>          MSR_TYPE_R | MSR_TYPE_W); if ( paging_mode_hap(d) &&
>>>>>              (!iommu_enabled || iommu_snoop) )
>>>>> vmx_disable_intercept_for_msr(v, MSR_IA32_CR_PAT, MSR_TYPE_R |
>>>>> MSR_TYPE_W); +        if ( (vmexit_ctl & VM_EXIT_CLEAR_BNDCFGS) &&
>>>>> +             (vmentry_ctl & VM_ENTRY_LOAD_BNDCFGS) ) +
>>>>> vmx_disable_intercept_for_msr(v, MSR_IA32_BNDCFGS, MSR_TYPE_R |
>>>>> MSR_TYPE_W);
>>>> 
>>>> So if vmentry/exit supports loading/clearing BNDCFGS, we don't
>>>> intercept the MSRs. 
>>>> 
>>>> Are they stored in the VMCS in this case?

Ah, sorry, yes.
A new guest-state field for IA32_BNDCFGS is added to the VMCS. In addition, two 
new controls are added:
* a VM-exit control called "clear BNDCFGS"
* a VM-entry control called "load BNDCFGS."

Thanks,
Jinsong

> 
> Please also explicitly address this question Andrew had raised. I
> suppose we could go hunt for the information in the spec, but I'm
> sure you know the answer without needing to waste much time.
> 
>>>> In the case that we intercept the MSRs, how and where do they get
>>>> saved/restored on context switch?
>>> 
>>> Yeah,m the code is clearly missing a vmx_add_guest_msr() or some
>>> such.
>> 
>> Thanks! and we also need vmx_add_host_load_msr() and implicitly
>> clear host MSR_IA32_BNDCFGS, right?
> 
> Yes, I think so.
> 
> Jan


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