[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH] xen/arm64: fix section shift when mapping 2MB block in boot page table
On Tue, 2014-01-14 at 01:06 +0800, Chen Baozi wrote: > Section shift for level-2 page table should be #21 rather than #20. Thanks, are you finding these issues on actual hardware or just by inspection? I think this change is correct, also arm32 has: 1: /* Setup boot_second: */ ldr r4, =boot_second add r4, r4, r10 /* r1 := paddr (boot_second) */ lsr r2, r9, #20 /* Base address for 2MB mapping */ lsl r2, r2, #20 orr r2, r2, #PT_UPPER(MEM) /* r2:r3 := section map */ orr r2, r2, #PT_LOWER(MEM) Either they are both wrong or both right (I think both wrong). The effect of this error is that bit #20 of paddr(boot_second) is preserved as bit #20 of the PTE, rather than being cleared. bit #20 of an entry at this level is UNK/SBZP -- so we survive this mistake even if paddr(boot_second) happens to have bit #20 set. Really this code should use {FIRST,SECOND,THIRD}_SHIFT, and this file already includes asm/page.h so they should be available... > > Signed-off-by: Chen Baozi <baozich@xxxxxxxxx> > --- > xen/arch/arm/arm64/head.S | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index bebddf0..ad35f60 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -292,8 +292,8 @@ skip_bss: > ldr x4, =boot_second > add x4, x4, x20 /* x4 := paddr (boot_second) */ > > - lsr x2, x19, #20 /* Base address for 2MB mapping */ > - lsl x2, x2, #20 > + lsr x2, x19, #21 /* Base address for 2MB mapping */ > + lsl x2, x2, #21 > mov x3, #PT_MEM /* x2 := Section map */ > orr x2, x2, x3 > _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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