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Re: [Xen-devel] [PATCH 8/8] x86/EPT: IOMMU snoop capability should not affect memory type selection

At 15:32 +0000 on 27 Mar (1395930772), Jan Beulich wrote:
> >>> On 27.03.14 at 16:12, <tim@xxxxxxx> wrote:
> > At 15:37 +0000 on 26 Mar (1395844658), Jan Beulich wrote:
> >> This capability solely makes a statement on cache coherency guarantees
> >> by the IOMMU. It does specifically not imply any further guarantees
> >> implied by certain memory types (cachability, ordering).
> > 
> > Can you give some examples of what this is protecting against?
> > 
> > Cachability is irrelevant unless there's some other form of direct
> > access that's not covered by the IOMMU, and x86 ordering is pretty
> > strict.
> What the IOMMU gets to see already depends on cachability: Especially
> for write buffers (WC) I don't think cache coherence really matters.

Right.  The x86 ordering rules, afaict, mean that this problem is
already solved for other cache-coherent memory writes, but maybe
it's not for OUTB, or for real direct MMIO?

At this point, I'll defer to anyone at Intel who understands how the
snooping actually works. :)  I have 34 more patches to review


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