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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v4 3/6] xen: arm: flush TLB on all CPUs when setting or clearing fixmaps
On 04/03/2014 09:59 AM, Ian Campbell wrote:
> +/*
> + * Flush a range of VA's hypervisor mappings from the data TLB of all
> + * processors in the inner-shareable domain. This is not sufficient
> + * when changing code mappings or for self modifying code.
> + */
> +static inline void flush_xen_data_tlb_range_va(unsigned long va,
> + unsigned long size)
> +{
> + unsigned long end = va + size;
> + dsb(sy); /* Ensure preceding are visible */
> + while ( va < end ) {
Same error as the previous patch :):
while ( ... )
{
Except that:
Acked-by: Julien Grall <julien.grall@xxxxxxxxxx>
Regards,
--
Julien Grall
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