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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [xen-4.2-testing test] 25826: trouble: broken/fail/pass
flight 25826 xen-4.2-testing real [real] http://www.chiark.greenend.org.uk/~xensrcts/logs/25826/ Failures and problems with tests :-( Tests which did not succeed and are blocking, including tests which could not be run: test-amd64-i386-qemut-rhel6hvm-intel 3 host-install(3) broken REGR. vs. 25805 test-amd64-i386-xl 3 host-install(3) broken REGR. vs. 25805 test-amd64-i386-xl-multivcpu 3 host-install(3) broken REGR. vs. 25805 test-amd64-i386-xl-win7-amd64 3 host-install(3) broken REGR. vs. 25805 test-i386-i386-xl-qemut-winxpsp3 3 host-install(3) broken REGR. vs. 25805 Tests which did not succeed, but are not blocking: test-amd64-amd64-xl-pcipt-intel 9 guest-start fail never pass test-amd64-i386-xl-qemuu-win7-amd64 14 guest-stop fail never pass test-amd64-i386-xend-winxpsp3 17 leak-check/check fail never pass test-amd64-i386-xl-qemut-winxpsp3-vcpus1 14 guest-stop fail never pass test-amd64-amd64-xl-winxpsp3 14 guest-stop fail never pass test-amd64-amd64-xl-qemuu-win7-amd64 14 guest-stop fail never pass test-amd64-i386-xl-winxpsp3-vcpus1 14 guest-stop fail never pass test-amd64-amd64-xl-qemut-win7-amd64 14 guest-stop fail never pass test-amd64-amd64-xl-win7-amd64 14 guest-stop fail never pass test-i386-i386-xl-winxpsp3 14 guest-stop fail never pass test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 14 guest-stop fail never pass test-amd64-i386-xend-qemut-winxpsp3 17 leak-check/check fail never pass test-i386-i386-xl-qemuu-winxpsp3 14 guest-stop fail never pass test-amd64-amd64-xl-qemuu-winxpsp3 14 guest-stop fail never pass test-amd64-i386-xl-qemut-win7-amd64 14 guest-stop fail never pass test-amd64-amd64-xl-qemut-winxpsp3 14 guest-stop fail never pass version targeted for testing: xen 9811c9bc85e648859f3a48478640ce2c696c9d06 baseline version: xen 4911963dd76abcc1f1770b118b7e4d04f584438b ------------------------------------------------------------ People who touched revisions under test: Jan Beulich <jbeulich@xxxxxxxx> Keir Fraser <keir@xxxxxxx> Kevin Tian <kevin.tian@xxxxxxxxx> Xiantao Zhang <xiantao.zhang@xxxxxxxxx> ------------------------------------------------------------ jobs: build-amd64 pass build-i386 pass build-amd64-oldkern pass build-i386-oldkern pass build-amd64-pvops pass build-i386-pvops pass test-amd64-amd64-xl pass test-amd64-i386-xl broken test-i386-i386-xl pass test-amd64-i386-rhel6hvm-amd pass test-amd64-i386-qemut-rhel6hvm-amd pass test-amd64-i386-qemuu-rhel6hvm-amd pass test-amd64-i386-qemuu-freebsd10-amd64 pass test-amd64-amd64-xl-qemut-win7-amd64 fail test-amd64-i386-xl-qemut-win7-amd64 fail test-amd64-amd64-xl-qemuu-win7-amd64 fail test-amd64-i386-xl-qemuu-win7-amd64 fail test-amd64-amd64-xl-win7-amd64 fail test-amd64-i386-xl-win7-amd64 broken test-amd64-i386-xl-credit2 pass test-amd64-i386-qemuu-freebsd10-i386 pass test-amd64-amd64-xl-pcipt-intel fail test-amd64-i386-rhel6hvm-intel pass test-amd64-i386-qemut-rhel6hvm-intel broken test-amd64-i386-qemuu-rhel6hvm-intel pass test-amd64-i386-xl-multivcpu broken test-amd64-amd64-pair pass test-amd64-i386-pair pass test-i386-i386-pair pass test-amd64-amd64-xl-sedf-pin pass test-amd64-amd64-pv pass test-amd64-i386-pv pass test-i386-i386-pv pass test-amd64-amd64-xl-sedf pass test-amd64-i386-xl-qemut-winxpsp3-vcpus1 fail test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 fail test-amd64-i386-xl-winxpsp3-vcpus1 fail test-amd64-i386-xend-qemut-winxpsp3 fail test-amd64-amd64-xl-qemut-winxpsp3 fail test-i386-i386-xl-qemut-winxpsp3 broken test-amd64-amd64-xl-qemuu-winxpsp3 fail test-i386-i386-xl-qemuu-winxpsp3 fail test-amd64-i386-xend-winxpsp3 fail test-amd64-amd64-xl-winxpsp3 fail test-i386-i386-xl-winxpsp3 fail ------------------------------------------------------------ sg-report-flight on osstest.cam.xci-test.com logs: /home/xc_osstest/logs images: /home/xc_osstest/images Logs, config files, etc. are available at http://www.chiark.greenend.org.uk/~xensrcts/logs Test harness code can be found at http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary Not pushing. ------------------------------------------------------------ commit 9811c9bc85e648859f3a48478640ce2c696c9d06 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Apr 9 11:52:21 2014 +0200 VMX: fix PAT value seen by guest The XSA-60 fixes introduced a window during which the guest PAT gets forced to all zeros. This shouldn't be visible to the guest. Therefore we need to intercept PAT MSR accesses during that time period. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Liu Jinsong <jinsong.liu@xxxxxxxxx> master commit: fce79f8ce91dc45f3a4d699ee67c49e6cbeb1197 master date: 2014-04-01 16:49:18 +0200 commit 83b912e1e6e4fccf5dc3f576742b68a9412edd29 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Apr 9 11:40:50 2014 +0200 x86/EPT: relax treatment of APIC MFN There's no point in this being mapped UC by the guest due to using a respective PAT index - set the ignore-PAT flag to true. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Tim Deegan <tim@xxxxxxx> master commit: 1f8b57779785bf9f55c16312bb1ec679929c314b master date: 2014-03-28 13:43:25 +0100 commit 83ed5a882495de9cee915614e30cbb22362061b4 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Apr 9 11:40:09 2014 +0200 x86/HVM: correct CPUID leaf 80000008 handling CPUID[80000008].EAX[23:16] have been given the meaning of the guest physical address restriction (in case it needs to be smaller than the host's), hence we need to mirror that into vCPUID[80000008].EAX[7:0]. Enforce a lower limit at the same time, as well as a fixed value for the virtual address bits, and zero for the guest physical address ones. In order for the vMTRR code to see these overrides we need to make it call hvm_cpuid() instead of domain_cpuid(), which in turn requires special casing (and relaxing) the controlling domain. This additionally should hide an ordering problem in the tools: Both xend and xl appear to be restoring a guest from its image before setting up the CPUID policy in the hypervisor, resulting in domain_cpuid() returning all zeros and hence the check in mtrr_var_range_msr_set() failing if the guest previously had more than the minimum 36 physical address bits. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Tim Deegan <tim@xxxxxxx> master commit: ef437690af8b75e6758dce77af75a22b63982883 master date: 2014-03-28 13:33:34 +0100 commit 2bd02cd208f9e644409fb5a1041efc14f09426b0 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Apr 9 11:39:08 2014 +0200 x86: fix determination of bit count for struct domain allocations We can't just add in the hole shift value, as the hole may be at or above the 44-bit boundary. Instead we need to determine the total bit count until reaching 32 significant (not squashed out) bits in PFN representations. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Acked-by: Keir Fraser <keir@xxxxxxx> master commit: b3d2f8b2cba9fce5bc8995612d0d13fcefec7769 master date: 2014-03-24 10:48:03 +0100 commit 3327c530101c877f303931ba44487bc48b9f0646 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Apr 9 11:38:20 2014 +0200 x86/Intel: work around Xeon 7400 series erratum AAI65 Linux commit 40e2d7f9b5dae048789c64672bf3027fbb663ffa ("x86 idle: Repair large-server 50-watt idle-power regression") tells us that this applies not just to the named Xeon 7400 series, but also NHM-EX and WSM-EX; sadly Intel's documentation is so badly searchable that I wasn't able to locate the respective errata (and hence can't quote their numbers here). Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Acked-by: Kevin Tian <kevin.tian@xxxxxxxxx> master commit: 96d1b237ae9b2f2718bb1c59820701f17d3d86e0 master date: 2014-03-17 16:47:22 +0100 commit c4fa33f7d4e90f86c14cc9eb56ddff7cc323ec5a Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Apr 9 11:37:15 2014 +0200 VT-d: fix RMRR handling Removing mapped RMRR tracking structures in dma_pte_clear_one() is wrong for two reasons: First, these regions may cover more than a single page. And second, multiple devices (and hence multiple devices assigned to any particular guest) may share a single RMRR (whether assigning such devices to distinct guests is a safe thing to do is another question). Therefore move the removal of the tracking structures into the counterpart function to the one doing the insertion - intel_iommu_remove_device(), and add a reference count to the tracking structure. Further, for the handling of the mappings of the respective memory regions to be correct, RMRRs must not overlap. Add a respective check to acpi_parse_one_rmrr(). And finally, with all of this being VT-d specific, move the cleanup of the list as well as the structure type definition where it belongs - in VT-d specific rather than IOMMU generic code. Note that this doesn't address yet another issue associated with RMRR handling: The purpose of the RMRRs as well as the way the respective IOMMU page table mappings get inserted both suggest that these regions would need to be marked E820_RESERVED in all (HVM?) guests' memory maps, yet nothing like this is being done in hvmloader. (For PV guests this would also seem to be necessary, but may conflict with PV guests possibly assuming there to be just a single E820 entry representing all of its RAM.) Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Acked-by: Xiantao Zhang <xiantao.zhang@xxxxxxxxx> master commit: dd527061770789d8152b1dea68056987b202d87a master date: 2014-03-17 16:45:04 +0100 commit 839b603e672c06481e38db2d3bb6c0eb67a23570 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Apr 9 11:30:12 2014 +0200 x86: make hypercall preemption checks consistent - never preempt on the first iteration (ensure forward progress) - never preempt on the last iteration (pointless/wasteful) Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Tim Deegan <tim@xxxxxxx> Acked-by: Keir Fraser <keir@xxxxxxx> master commit: fd7bfce0395ace266159760e35dc49f7af3b90ce master date: 2014-03-13 14:27:51 +0100 commit 584eb273dbd8f4325f419c0d1e160f1579c9efa4 Author: Jan Beulich <jbeulich@xxxxxxxx> Date: Wed Apr 9 11:28:46 2014 +0200 common: make hypercall preemption checks consistent - never preempt on the first iteration (ensure forward progress) - do cheap checks first Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Tim Deegan <tim@xxxxxxx> Acked-by: Keir Fraser <keir@xxxxxxx> master commit: 8c0eed2cc8d8a2ccccdffe4c386b625b672dc12a master date: 2014-03-13 14:26:35 +0100 (qemu changes not included) _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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