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Re: [Xen-devel] [PATCH v2] x86/HAP: also flush TLB when altering a present 1G entry or intermediate levels

To: Jan Beulich <JBeulich@xxxxxxxx>
From: Tim Deegan <tim@xxxxxxx>
Date: Mon, 14 Apr 2014 14:12:11 +0200
Cc: xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
Delivery-date: Mon, 14 Apr 2014 12:12:15 +0000
List-id: Xen developer discussion <xen-devel.lists.xen.org>

At 12:37 +0100 on 14 Apr (1397475434), Jan Beulich wrote:
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

Acked-by: Tim Deegan <tim@xxxxxxx>


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References:
- [Xen-devel] [PATCH v2] x86/HAP: also flush TLB when altering a present 1G entry or intermediate levels
  - From: Jan Beulich

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