[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v2 0/2] vgic emulation and GICD_ITARGETSR
Hi all, this small patch series improves vgic emulation in relation to GICD_ITARGETSR and irq delivery. At the moment we don't support irq delivery to vcpu != 0, so prevent the guest from setting itarget to something != 0. vgic_enable_irqs and vgic_disable_irqs currently ignore the itarget settings and just enable/disable irqs on the current vcpu. Fix their behaviour to enable/disable irqs on the vcpu set by itarget, that is always vcpu0 for irq >= 32. Stefano Stabellini (2): xen/arm: ignore guest writes to GICD_ITARGETSR for SPIs xen/arm: observe itarget setting in vgic_enable_irqs and vgic_disable_irqs xen/arch/arm/vgic.c | 50 ++++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 42 insertions(+), 8 deletions(-) _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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