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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v4 16/16] xen/arm: add SGI handling for GICv3
On Mon, Jun 2, 2014 at 9:43 PM, Ian Campbell <Ian.Campbell@xxxxxxxxxx> wrote:
> On Mon, 2014-06-02 at 17:05 +0100, Stefano Stabellini wrote:
>> > +static int vgicv3_to_sgi(struct vcpu *v, register_t sgir)
>> > +{
>> > + int virq;
>> > + int irqmode;
>> > + unsigned long vcpu_mask = 0;
>> > +
>> > + irqmode = (sgir >> ICH_SGI_IRQMODE_SHIFT) & ICH_SGI_IRQMODE_MASK;
>> > + virq = (sgir >> ICH_SGI_IRQ_SHIFT ) & ICH_SGI_IRQ_MASK;
>> > + vcpu_mask = sgir & ICH_SGI_TARGETLIST_MASK;
>> > +
>> > + return vgic_to_sgi(v, sgir, irqmode, virq, vcpu_mask);
>> > +}
>>
>> Given that we are not handling affinity 1, 2 and 3 settings, we should
>> add an assert to make sure that they are 0.
>
> Not literally an assert since that would give guests a trivial way to
> DoS the system....
IMHO, Since we are ignoring AFF{1,2,3} instead of assert, a warning
should be enough
>
> Given that we create guest VCPUs with MPIDR's which do not use
> AFF{1,2,3} I think we can simply ignore any attempt to SGI those
> processors, since they can't exist.
>
> Of course this will mean implementing a 16 VCPU limit somewhere on the
> creation side, so we actually do not create VCPUs with higher AFF's
> used...
Also from the spec it says that invalid AFF's will be discarded
"Note: if software specifies Affinity 3 (if appropriate), Affinity 2
and Affinity 1 values that do not correspond to a
valid set of target processors the Distributor must acknowledge and
discard the Generate SGI packet. It may
optionally generate an SEI."
>
> There should of course be a suitable comment both here and there...
>
> Ian.
>
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