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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v5 07/21] arm/xen: move GIC context data structure to gic driver
On Thu, 12 Jun 2014, vijay.kilari@xxxxxxxxx wrote:
> From: Vijaya Kumar K <Vijaya.Kumar@xxxxxxxxxxxxxxxxxx>
>
> arch_domain in domain.h defines all the GIC registers
> that needs to be saved/restored directly.
>
> These GIC registers are GIC HW version specific. The number
> of registers and size of registers varies with GIC version.
> So move these registers to gic.h file and make a union of these
> registers. This helps to define GIC HW version specific
> structure to this union for later GIC versions.
>
> Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@xxxxxxxxxxxxxxxxxx>
Acked-by: Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>
> xen/arch/arm/gic-v2.c | 14 +++++++-------
> xen/include/asm-arm/domain.h | 5 +++--
> xen/include/asm-arm/gic.h | 18 ++++++++++++++++++
> 3 files changed, 28 insertions(+), 9 deletions(-)
>
> diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
> index 9cf1dc8..8eb8f0b 100644
> --- a/xen/arch/arm/gic-v2.c
> +++ b/xen/arch/arm/gic-v2.c
> @@ -111,10 +111,10 @@ static void gicv2_save_state(struct vcpu *v)
> * accessed simultaneously by another pCPU.
> */
> for ( i = 0; i < gicv2_info.nr_lrs; i++ )
> - v->arch.gic_lr[i] = readl_relaxed(GICH + GICH_LR + i * 4);
> + v->arch.gic.v2.lr[i] = readl_relaxed(GICH + GICH_LR + i * 4);
>
> - v->arch.gic_apr = readl_relaxed(GICH + GICH_APR);
> - v->arch.gic_vmcr = readl_relaxed(GICH + GICH_VMCR);
> + v->arch.gic.v2.apr = readl_relaxed(GICH + GICH_APR);
> + v->arch.gic.v2.vmcr = readl_relaxed(GICH + GICH_VMCR);
> /* Disable until next VCPU scheduled */
> writel_relaxed(0, GICH + GICH_HCR);
> }
> @@ -124,10 +124,10 @@ static void gicv2_restore_state(const struct vcpu *v)
> int i;
>
> for ( i = 0; i < gicv2_info.nr_lrs; i++ )
> - writel_relaxed(v->arch.gic_lr[i], GICH + GICH_LR + i * 4);
> + writel_relaxed(v->arch.gic.v2.lr[i], GICH + GICH_LR + i * 4);
>
> - writel_relaxed(v->arch.gic_apr, GICH + GICH_APR);
> - writel_relaxed(v->arch.gic_vmcr, GICH + GICH_VMCR);
> + writel_relaxed(v->arch.gic.v2.apr, GICH + GICH_APR);
> + writel_relaxed(v->arch.gic.v2.vmcr, GICH + GICH_VMCR);
> writel_relaxed(GICH_HCR_EN, GICH + GICH_HCR);
> }
>
> @@ -144,7 +144,7 @@ static void gicv2_dump_state(const struct vcpu *v)
> else
> {
> for ( i = 0; i < gicv2_info.nr_lrs; i++ )
> - printk(" VCPU_LR[%d]=%x\n", i, v->arch.gic_lr[i]);
> + printk(" VCPU_LR[%d]=%x\n", i, v->arch.gic.v2.lr[i]);
> }
> }
>
> diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
> index 36d82e2..591a825 100644
> --- a/xen/include/asm-arm/domain.h
> +++ b/xen/include/asm-arm/domain.h
> @@ -8,6 +8,7 @@
> #include <asm/p2m.h>
> #include <asm/vfp.h>
> #include <asm/mmio.h>
> +#include <asm/gic.h>
> #include <public/hvm/params.h>
> #include <xen/serial.h>
> #include <xen/hvm/iommu.h>
> @@ -263,8 +264,8 @@ struct arch_vcpu
> uint32_t csselr;
> register_t vmpidr;
>
> - uint32_t gic_hcr, gic_vmcr, gic_apr;
> - uint32_t gic_lr[64];
> + /* Holds gic context data */
> + union gic_state_data gic;
> uint64_t lr_mask;
>
> struct {
> diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
> index 11a7c1d..978a968 100644
> --- a/xen/include/asm-arm/gic.h
> +++ b/xen/include/asm-arm/gic.h
> @@ -148,6 +148,24 @@
> DT_MATCH_COMPATIBLE("arm,cortex-a7-gic")
>
> /*
> + * GICv2 register that needs to be saved/restored
> + * on VCPU context switch
> + */
> +struct gic_v2 {
> + uint32_t hcr;
> + uint32_t vmcr;
> + uint32_t apr;
> + uint32_t lr[64];
> +};
> +
> +/*
> + * Union to hold underlying hw version context information
> + */
> +union gic_state_data {
> + struct gic_v2 v2;
> +};
> +
> +/*
> * Decode LR register content.
> * The LR register format is different for GIC HW version
> */
> --
> 1.7.9.5
>
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