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Re: [Xen-devel] [PATCH v6 3/5] xen/arm: support irq delivery to vcpu > 0

To: Julien Grall <julien.grall@xxxxxxxxxx>
From: Ian Campbell <Ian.Campbell@xxxxxxxxxx>
Date: Fri, 27 Jun 2014 16:42:43 +0100
Cc: Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>, xen-devel@xxxxxxxxxxxxx
Delivery-date: Fri, 27 Jun 2014 15:43:08 +0000
List-id: Xen developer discussion <xen-devel.lists.xen.org>

On Tue, 2014-06-24 at 14:33 +0100, Julien Grall wrote:

> > +    /* the IRQ needs to be an SPI */
> > +    ASSERT(irq >= 32 && irq <= 1019);
> 
> I would use gic_number_lines() rather than 1019 here.

Or at least #define GIC_MAX_SPI 1019.

Ian.


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References:
- [Xen-devel] [PATCH v6 0/5] vgic emulation and GICD_ITARGETSR
  - From: Stefano Stabellini
- [Xen-devel] [PATCH v6 3/5] xen/arm: support irq delivery to vcpu > 0
  - From: Stefano Stabellini
- Re: [Xen-devel] [PATCH v6 3/5] xen/arm: support irq delivery to vcpu > 0
  - From: Julien Grall

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