Re: [Xen-devel] [PATCH v3] xen/arm: introduce PLATFORM_QUIRK_GUEST_PIRQ_NEED_EOI

[Pranavkumar Sawargaonkar <psawargaonkar@xxxxxxx>]

Hi Stefano/ Ian,

On Wed, Jul 9, 2014 at 6:11 PM, Ian Campbell <Ian.Campbell@xxxxxxxxxx> wrote:
> On Fri, 2014-07-04 at 15:39 +0100, Stefano Stabellini wrote:
>> GICH_LR_HW doesn't work as expected on X-Gene: request maintenance
>> interrupts and perform EOIs in the hypervisor for hardware interrupts as
>> a workaround.  Trigger this behaviour with a per platform option.
>>
>> This patch assumes that GICC_DIR can be written on any pcpu for a given
>> SGI, not matter where GICC_IAR has been read before.
>
> Did you really mean SGI here? Those are per-cpu, I suspect you meant
> SPI?
>
> Ack to the actual patch though.
>
> Ian.
>

We have found clean fix for this issue in u-boot.

The issue is that X-Gene does not implement security extensions
but the GIC-400 present in X-Gene has security extensions. To take
care of this situation, APM HW designers have provided two sets
of GIC register addresses: one for accessing GIC secured registers,
and another for accessing GIC non-secured registers. Currently, we
are only accessing GIC secured register for Linux, Xen, and KVM.
This works fine in most cases but does not work for GICH_LRn.HW
bit because we can only auto-deactivate non-secured interrupts using
GICH_LRn.HW bit.

To fix this issue, we have updated u-boot to initialize GIC secured
register to make all interrupts as non-secured and we will need to
access GIC non-secured registers from Linux, Xen, KVM, and
everywhere else.

For now, you can go ahead with this patch but once we have updated
u-boot released by APM then we will need to disable the quirk for
X-Gene Mustang. We would be also having a patch for Linux to fix
the GIC addresses in X-Gene Storm DTS file.

Thanks,
Pranav

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