[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH 1/9] xen: arm: Correct PMXEV cp register definitions
p15,0,c9,c13,1 is PMXEVTYPER not PMXEVCNTR. p15,0,c9,c13,2 is PMXEVCNTR not PMXEVCNR. Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx> --- xen/arch/arm/traps.c | 2 +- xen/include/asm-arm/cpregs.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 019991f..c838b70 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -1514,8 +1514,8 @@ static void do_cp15_32(struct cpu_user_regs *regs, case HSR_CPREG32(PMCEID0): case HSR_CPREG32(PMCEID1): case HSR_CPREG32(PMCCNTR): + case HSR_CPREG32(PMXEVTYPER): case HSR_CPREG32(PMXEVCNTR): - case HSR_CPREG32(PMXEVCNR): case HSR_CPREG32(PMUSERENR): case HSR_CPREG32(PMINTENSET): case HSR_CPREG32(PMINTENCLR): diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h index f1100c8..afe9148 100644 --- a/xen/include/asm-arm/cpregs.h +++ b/xen/include/asm-arm/cpregs.h @@ -222,8 +222,8 @@ #define PMCEID0 p15,0,c9,c12,6 /* Perf. Mon. Common Event Identification register 0 */ #define PMCEID1 p15,0,c9,c12,7 /* Perf. Mon. Common Event Identification register 1 */ #define PMCCNTR p15,0,c9,c13,0 /* Perf. Mon. Cycle Count Register */ -#define PMXEVCNTR p15,0,c9,c13,1 /* Perf. Mon. Event Type Select Register */ -#define PMXEVCNR p15,0,c9,c13,2 /* Perf. Mon. Event Count Register */ +#define PMXEVTYPER p15,0,c9,c13,1 /* Perf. Mon. Event Type Select Register */ +#define PMXEVCNTR p15,0,c9,c13,2 /* Perf. Mon. Event Count Register */ #define PMUSERENR p15,0,c9,c14,0 /* Perf. Mon. User Enable Register */ #define PMINTENSET p15,0,c9,c14,1 /* Perf. Mon. Interrupt Enable Set Register */ #define PMINTENCLR p15,0,c9,c14,2 /* Perf. Mon. Interrupt Enable Clear Register */ -- 1.7.10.4 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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