[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH for-4.5] docs/commandline: Fix formatting issues
In both of these cases, markdown was interpreting the text as regular text, and reflowing it as a regular paragraph, leading to a single line as output. Reformat them as code blocks inside blockquote blocks, which causes them to take their precise whitespace layout. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> CC: Ian Campbell <Ian.Campbell@xxxxxxxxxx> CC: Ian Jackson <Ian.Jackson@xxxxxxxxxxxxx> CC: Wei Liu <wei.liu2@xxxxxxxxxx> CC: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx> --- Konrad: this is a documentation fix, so requesting a 4.5 ack please. --- docs/misc/xen-command-line.markdown | 38 +++++++++++++++++------------------ 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/docs/misc/xen-command-line.markdown b/docs/misc/xen-command-line.markdown index f054d4b..e3a5a15 100644 --- a/docs/misc/xen-command-line.markdown +++ b/docs/misc/xen-command-line.markdown @@ -475,13 +475,13 @@ defaults of 1 and unlimited respectively are used instead. For example, with `dom0_max_vcpus=4-8`: - Number of - PCPUs | Dom0 VCPUs - 2 | 4 - 4 | 4 - 6 | 6 - 8 | 8 - 10 | 8 +> Number of +> PCPUs | Dom0 VCPUs +> 2 | 4 +> 4 | 4 +> 6 | 6 +> 8 | 8 +> 10 | 8 ### dom0\_mem > `= List of ( min:<size> | max:<size> | <size> )` @@ -684,18 +684,18 @@ supported only when compiled with XSM\_ENABLE=y on x86. The specified value is a bit mask with the individual bits having the following meaning: -Bit 0 - debug level 0 (unused at present) -Bit 1 - debug level 1 (Control Register logging) -Bit 2 - debug level 2 (VMX logging of MSR restores when context switching) -Bit 3 - debug level 3 (unused at present) -Bit 4 - I/O operation logging -Bit 5 - vMMU logging -Bit 6 - vLAPIC general logging -Bit 7 - vLAPIC timer logging -Bit 8 - vLAPIC interrupt logging -Bit 9 - vIOAPIC logging -Bit 10 - hypercall logging -Bit 11 - MSR operation logging +> Bit 0 - debug level 0 (unused at present) +> Bit 1 - debug level 1 (Control Register logging) +> Bit 2 - debug level 2 (VMX logging of MSR restores when context switching) +> Bit 3 - debug level 3 (unused at present) +> Bit 4 - I/O operation logging +> Bit 5 - vMMU logging +> Bit 6 - vLAPIC general logging +> Bit 7 - vLAPIC timer logging +> Bit 8 - vLAPIC interrupt logging +> Bit 9 - vIOAPIC logging +> Bit 10 - hypercall logging +> Bit 11 - MSR operation logging Recognized in debug builds of the hypervisor only. -- 1.7.10.4 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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