[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v3 21/27] Ovmf/Xen: add ARM and AArch64 support to XenBusDxe
On Tue, 3 Feb 2015, Ard Biesheuvel wrote: > This patch adds support to XenBusDxe for executing on ARM and AArch64 > machines (the former only when built with GCC). Wouldn't it be simpler to just provide an asm implementation of them? Similarly to OvmfPkg/XenBusDxe/X64/TestAndClearBit.nasm and OvmfPkg/XenBusDxe/X64/InterlockedCompareExchange16.nasm? > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx> > --- > OvmfPkg/XenBusDxe/AtomicsGcc.c | 44 > +++++++++++++++++++++++++++++++++++++++++ > OvmfPkg/XenBusDxe/XenBusDxe.inf | 3 +++ > 2 files changed, 47 insertions(+) > create mode 100644 OvmfPkg/XenBusDxe/AtomicsGcc.c > > diff --git a/OvmfPkg/XenBusDxe/AtomicsGcc.c b/OvmfPkg/XenBusDxe/AtomicsGcc.c > new file mode 100644 > index 000000000000..a0bdcbf67440 > --- /dev/null > +++ b/OvmfPkg/XenBusDxe/AtomicsGcc.c > @@ -0,0 +1,44 @@ > +/** @file > + Arch-independent implementations of XenBusDxe atomics using GCC __builtins > + > + Copyright (C) 2014, Linaro Ltd. > + > + This program and the accompanying materials > + are licensed and made available under the terms and conditions of the BSD > License > + which accompanies this distribution. The full text of the license may be > found at > + http://opensource.org/licenses/bsd-license.php > + > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR > IMPLIED. > + > +**/ > + > +UINT16 > +EFIAPI > +InternalSyncCompareExchange16 ( > + IN volatile UINT16 *Value, > + IN UINT16 CompareValue, > + IN UINT16 ExchangeValue > + ) > +{ > + return __sync_val_compare_and_swap_2 (Value, CompareValue, ExchangeValue); > +} > + > +INT32 > +EFIAPI > +TestAndClearBit ( > + IN INT32 Bit, > + IN volatile VOID *Address > + ) > +{ > + // > + // Calculate the effective address relative to 'Address' based on the > + // higher order bits of 'Bit'. Use signed shift instead of division to > + // ensure we round towards -Inf, and end up with a positive shift in 'Bit', > + // even if 'Bit' itself is negative. > + // > + Address += (Bit >> 5) * sizeof(INT32); > + Bit &= 31; > + > + return (__sync_fetch_and_and_4 (Address, ~(1U << Bit)) & (1U << Bit)) != 0; > +} > diff --git a/OvmfPkg/XenBusDxe/XenBusDxe.inf b/OvmfPkg/XenBusDxe/XenBusDxe.inf > index 31553ac5a64a..949ec0a0c732 100644 > --- a/OvmfPkg/XenBusDxe/XenBusDxe.inf > +++ b/OvmfPkg/XenBusDxe/XenBusDxe.inf > @@ -54,6 +54,9 @@ > X64/InterlockedCompareExchange16.nasm > X64/TestAndClearBit.nasm > > +[Sources.AARCH64, Sources.ARM] > + AtomicsGcc.c | GCC > + > [LibraryClasses] > UefiDriverEntryPoint > UefiBootServicesTableLib > -- > 1.8.3.2 > _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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