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[Xen-devel] [PATCH 2/3] x86/traps: Use write_atomic() when updating potentially-live descriptors



Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CC: Jan Beulich <JBeulich@xxxxxxxx>
CC: Tim Deegan <tim@xxxxxxx>

---

atomic.h currently can't be included in either location because of dependency
issues.  As this is part of a bugfix series which needs backporting, I opted
to opencode write_atomic() rather than something more invasive to the header
files.
---
 xen/include/asm-x86/desc.h      |    3 ++-
 xen/include/asm-x86/processor.h |    5 ++++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/xen/include/asm-x86/desc.h b/xen/include/asm-x86/desc.h
index 20c47d2..30f1a7a 100644
--- a/xen/include/asm-x86/desc.h
+++ b/xen/include/asm-x86/desc.h
@@ -116,7 +116,8 @@ static inline void _write_gate_lower(volatile idt_entry_t 
*gate,
                                      const idt_entry_t *new)
 {
     ASSERT(gate->b == new->b);
-    gate->a = new->a;
+    /* TODO: untangle the #include hierachy and use write_atomic() here. */
+    asm volatile ("movq %1,%0" : "=m" (gate->a) : "r" (new->a));
 }
 
 #define _set_gate(gate_addr,type,dpl,addr)               \
diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h
index 2773ea8..c703581 100644
--- a/xen/include/asm-x86/processor.h
+++ b/xen/include/asm-x86/processor.h
@@ -444,9 +444,12 @@ struct __packed __cacheline_aligned tss_struct {
  * descriptor table entry. */
 static always_inline void set_ist(idt_entry_t *idt, unsigned long ist)
 {
+    u64 new_a = (idt->a & ~(7UL << 32)) | (ist << 32);
+
     /* IST is a 3 bit field, 32 bits into the IDT entry. */
     ASSERT(ist <= IST_MAX);
-    idt->a = (idt->a & ~(7UL << 32)) | (ist << 32);
+    /* TODO: untangle the #include hierachy and use write_atomic() here. */
+    asm volatile ("movq %1,%0" : "=m" (idt->a) : "r" (new_a));
 }
 
 #define IDT_ENTRIES 256
-- 
1.7.10.4


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