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Re: [Xen-devel] Question, Lock of pending_irq struct in Xen ARM.



 

Very simple reason...

 

I see.

Thanks. 

 

-----Original Message-----
From: "Stefano Stabellini"<stefano.stabellini@xxxxxxxxxxxxx>
To: "ììì"<supsup5642@xxxxxxxxx>;
Cc: <xen-devel@xxxxxxxxxxxxx>; <tim@xxxxxxx>;
Sent: 2015-03-09 (ì) 20:07:51
Subject: Re: [Xen-devel] Question, Lock of pending_irq struct in Xen ARM.
 

On Mon, 9 Mar 2015, ììì wrote:
> HI.
>
> I'm now modifying GIC in Xen 4.5.0. 
>
> I have some question about lock of pending_irq struct in Xen ARM. 
>
>  
>
> pending_irq of SGI and PPI is stored in 'vcpu struct'. (IRQ num 0 ~ 31)
>
> pending_irq of SPI is stored in 'domain struct'. (IRQ num 32 ~ )
>
>  
>
> For accessing pending_irq struct, Xen use 'irq_to_pending(struct vcpu *v, int  irq)' function.
>
> irq_to_pending function return proper pending_irq depending on IRQ number. 
>
>  
>
>  
>
> * 'gic_update_one_lr' function process
>
> 1) before call gic_update_one_lr, xen acquire like this "spin_lock_irqsave(&v->arch.vgic.lock, flags)";
>
> 2) In gic_update_one_lr, get pending_irq through irq_to_pending function.
>
> 3) change state of irq_to_pending and update lr
>
>  
>
> When IRQ number is below 31, irq_to_pending function return pending_irq stored in vcpu struct.
>
> It's ok to change irq_to_pending state, because &v->arch.vgic.lock acquire.
>
> But When IRQ number is above 32, irq_to_pending function return pending_irq stored in domain struct.
>
> And change state of irq_to_pending without domain's lock.
>
> I think that pending_irq of SPI stored in domain struct is shared among vcpus. and need to acquire domain's lock before
> change pending_irq.
>
> But why don't use domain's lock in Xen Code ??

Thanks for the good analysis and the well framed question.

It is safe to acquire just the vcpu lock, rather than the domain lock,
because we always configure the system so that SPIs are delivered to
just one physical cpu/one vcpu. It is not possible to receive an SPI in
pcpu0 or pcpu1. Therefore it is not possible to change the same
pending_irq on two different cpus simultaneously.
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