[Xen-devel] [PATCH WIP v1 10/10] Tegra hacking.

[Ian Campbell <ian.campbell@xxxxxxxxxx>]

Works without all this stuff.
---
 xen/arch/arm/platforms/tegra.c | 68 +++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 67 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/platforms/tegra.c b/xen/arch/arm/platforms/tegra.c
index 189ef44..5ec9dda 100644
--- a/xen/arch/arm/platforms/tegra.c
+++ b/xen/arch/arm/platforms/tegra.c
@@ -191,6 +191,45 @@ static struct mmio_handler_ops tegra_mmio_ictlr = {
     .write_handler = ictlr_write,
 };
 
+static inline void tegra_irq_write_mask(unsigned int irq, unsigned long reg)
+{
+    void __iomem *base;
+    u32 mask;
+
+    BUG_ON(irq < NR_LOCAL_IRQS ||
+           irq >= NR_LOCAL_IRQS + ARRAY_SIZE(ictlr_info) * 32);
+
+    irq -= NR_LOCAL_IRQS;
+    base = ictlr + 0x100 * (irq / 32);
+    mask = BIT(irq % 32);
+
+    writel(mask, base + reg);
+}
+
+static void tegra_irq_eoi(struct irq_desc *desc)
+{
+    int irq = desc->irq;
+    if ( irq < NR_LOCAL_IRQS )
+        return;
+    //tegra_irq_write_mask(irq, ICTLR_CPU_IEP_FIR_CLR);
+}
+
+static void tegra_irq_mask(struct irq_desc *desc)
+{
+    int irq = desc->irq;
+    if ( irq < NR_LOCAL_IRQS )
+        return;
+    tegra_irq_write_mask(irq, ICTLR_CPU_IER_CLR);
+}
+
+static void tegra_irq_unmask(struct irq_desc *desc)
+{
+    int irq = desc->irq;
+    if ( irq < NR_LOCAL_IRQS )
+        return;
+    tegra_irq_write_mask(irq, ICTLR_CPU_IER_SET);
+}
+
 static void tegra_route_irq_to_guest(struct domain *d, struct irq_desc *desc)
 {
     int irq = desc->irq;
@@ -256,7 +295,7 @@ static int map_one_spi(struct domain *d, const char *what,
  */
 static int tegra_specific_mapping(struct domain *d)
 {
-    int ret;
+    int ret/*, i*/;
 
     ret = map_one_mmio(d, "IRAM", paddr_to_pfn(0x40000000),
                                   paddr_to_pfn(0x40040000));
@@ -312,6 +351,29 @@ static int tegra_specific_mapping(struct domain *d)
     if ( ret )
         goto err;
 
+#if 0
+    ret = map_one_spi(d, "PCI INTx", 98, DT_IRQ_TYPE_LEVEL_HIGH);
+    if ( ret )
+        goto err;
+
+    ret = map_one_spi(d, "PCI MSI", 99, DT_IRQ_TYPE_LEVEL_HIGH);
+    if ( ret )
+        goto err;
+
+    for ( i = 104 ; i < 119 ; i++ )
+    {
+        ret = map_one_spi(d, "AHB DMA", i, DT_IRQ_TYPE_LEVEL_HIGH);
+        if ( ret )
+            goto err;
+    }
+    for ( i = 128 ; i < 143 ; i++ )
+    {
+        ret = map_one_spi(d, "AHB DMA", i, DT_IRQ_TYPE_LEVEL_HIGH);
+        if ( ret )
+            goto err;
+    }
+#endif
+
     register_mmio_handler(d, &tegra_mmio_ictlr, ICTLR_BASE, ICTLR_SIZE);
 
     ret = 0;
@@ -379,6 +441,10 @@ PLATFORM_START(tegra, "TEGRA124")
     .reset = tegra_reset,
     .specific_mapping = tegra_specific_mapping,
 
+    .irq_eoi = tegra_irq_eoi,
+    .irq_mask = tegra_irq_mask,
+    .irq_unmask = tegra_irq_unmask,
+
     .route_irq_to_guest = tegra_route_irq_to_guest,
 
     .dom0_gnttab_start = 0x68000000,
-- 
2.1.4


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