[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH 03/12] xen: arm: Use ARMv8 names for CNTHCTL_EL2 bits
Rather than using the v8 register names and the v7 bit names, which makes things needlessly difficult when reading. Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx> --- v3: New patch. --- xen/arch/arm/time.c | 2 +- xen/include/asm-arm/processor.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index 352e25e..ce6d3fd 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -230,7 +230,7 @@ void __cpuinit init_timer_interrupt(void) /* Sensible defaults */ WRITE_SYSREG64(0, CNTVOFF_EL2); /* No VM-specific offset */ /* Do not let the VMs program the physical timer, only read the physical counter */ - WRITE_SYSREG32(CNTHCTL_PA, CNTHCTL_EL2); + WRITE_SYSREG32(CNTHCTL_EL2_EL1PCTEN, CNTHCTL_EL2); WRITE_SYSREG32(0, CNTP_CTL_EL0); /* Physical timer disabled */ WRITE_SYSREG32(0, CNTHP_CTL_EL2); /* Hypervisor's timer disabled */ isb(); diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index fcd26fb..570d2a1 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -555,8 +555,8 @@ union hsr { #define FSC_LL_MASK (_AC(0x03,U)<<0) /* Time counter hypervisor control register */ -#define CNTHCTL_PA (1u<<0) /* Kernel/user access to physical counter */ -#define CNTHCTL_TA (1u<<1) /* Kernel/user access to CNTP timer */ +#define CNTHCTL_EL2_EL1PCTEN (1u<<0) /* Kernel/user access to physical counter */ +#define CNTHCTL_EL2_EL1PCEN (1u<<1) /* Kernel/user access to CNTP timer regs */ /* Timer control registers */ #define CNTx_CTL_ENABLE (1u<<0) /* Enable timer */ -- 1.7.10.4 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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