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Re: [Xen-devel] [PATCH 0/2] Re-factoring passthrough/pci.c and adding place-holder code for ARM/PCI



Hi Julien,
________________________________________
From: Julien Grall <julien.grall.oss@xxxxxxxxx>
Sent: Monday, April 13, 2015 3:49 PM
To: Jaggi, Manish; xen Devel; Stefano Stabellini; Julien Grall; Ian Campbell; 
Kumar, Vijaya; Prasun.kapoor@xxxxxxxxxx
Subject: Re: [Xen-devel] [PATCH 0/2] Re-factoring passthrough/pci.c and adding 
place-holder code for ARM/PCI

Hi Manish,

On 13/04/15 08:37, Manish Jaggi wrote:
> Xen currently does not have PCI support for ARM builds. This patch set
> makes the code compilable for ARM PCI and adds places-holder code
> which would be replaced with PCI pass-through support patch series.

May I ask why you did send directly all the code to support PCI on ARM?

Without the rest it's hard to tell whether these patches make sense or not.
[Manish] As I have mentioned these two patches are only for refactoring msi 
specific  functions to x86 files and providing the constructs that make PCI ARM 
code compilable.

The code for PCI ARM is very basic in the patch and PCI passthrough code 
patches will follow in next series. Please let me know which code does not 
makes sense and I will modify it.

> Re-factor MSI Handling
> -------------
> There is a some x86 specific code which is found in common code:
> xen/drivers/passthrough/pci.c which needs to be re factored.
>
> MSI/X are configured and handled by dom0 or domU code on ARM64 and is not
> required to be part of common code. However there are functions which are
> used as part of common code and calls to these functions cannot be easily
> re factored like pci_cleanup_msi.

On x86, the hypervisor is taking care of MSI (enabling/disabling in the
config space) as long as doing sanity check on MSI used by a given domain.

How do you plan to handle it on ARM? IHMO, the MSI code is very useful
and would also help GIC MSI implement (ITS + V2M).

[manish] As we had discussed in Linaro Connect and over the mailing list MSIs 
(LPIs in ARMv8) are handled directly on ARM by the guest and hypervisor is only 
doing injection of the LPIs using GIVv3 emulation. 

FWIW, I've pointed out the same issue on the ITS series a couple of
weeks ago.

Regards,

--
Julien Grall
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