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[Xen-devel] xen/arm: On chip memory mappings


I'd like to support the assignment of on chip RAMs to guests, starting with 

The mmio-sram compatible device kinda works already but the 2nd stage MMU
mapping is done with DEVICE memory attributes. This doesn't work well for
SRAMs for several reasons (e.g performance, alignment checks etc).

I guess we could add special treatment of these nodes to create Normal memory 

The rules for combining the memory attributes from S1 and S2 translations
suggest that mapping things at S2 with Normal memory Inner/Outer WB cacheable
would give the guest/S1 flexibility in choosing the final attributes.
It seems to me like guest drivers have the best knowledge to decide how to
map the node memory regions.

Keeping the S2 shareability set to inner (like we already do for memory)
seems to be a good idea though.

So the question I had is, why do we map nodes at S2 with DEVICE attributes at 
Am I missing something?


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