Re: [Xen-devel] [PATCH v4 1/4] x86: Support enable CDP by boot parameter and add get CDP status

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 17/09/15 10:35, He Chen wrote:
> Add boot parameter `psr=cdp` to enable CDP at boot time.
> Intel Code/Data Prioritization(CDP) feature is based on CAT. Note that
> cos_max would be half when CDP is on. struct psr_cat_cbm is extended to
> support CDP operation. Extend psr_get_cat_l3_info sysctl to get CDP
> status.
>
> Signed-off-by: He Chen <he.chen@xxxxxxxxxxxxxxx>
> ---
>  docs/misc/xen-command-line.markdown | 11 ++++-
>  xen/arch/x86/psr.c                  | 84 
> ++++++++++++++++++++++++++++++-------
>  xen/arch/x86/sysctl.c               |  5 ++-
>  xen/include/asm-x86/msr-index.h     |  3 ++
>  xen/include/asm-x86/psr.h           | 11 ++++-
>  xen/include/public/sysctl.h         |  4 +-
>  6 files changed, 98 insertions(+), 20 deletions(-)
>
> diff --git a/docs/misc/xen-command-line.markdown 
> b/docs/misc/xen-command-line.markdown
> index a2e427c..d92e323 100644
> --- a/docs/misc/xen-command-line.markdown
> +++ b/docs/misc/xen-command-line.markdown
> @@ -1165,9 +1165,9 @@ This option can be specified more than once (up to 8 
> times at present).
>  > `= <integer>`
>  
>  ### psr (Intel)
> -> `= List of ( cmt:<boolean> | rmid_max:<integer> | cat:<boolean> | 
> cos_max:<integer> )`
> +> `= List of ( cmt:<boolean> | rmid_max:<integer> | cat:<boolean> | 
> cos_max:<integer> | cdp:<boolean> )`
>  
> -> Default: `psr=cmt:0,rmid_max:255,cat:0,cos_max:255`
> +> Default: `psr=cmt:0,rmid_max:255,cat:0,cos_max:255,cdp:0`
>  
>  Platform Shared Resource(PSR) Services.  Intel Haswell and later server
>  platforms offer information about the sharing of resources.
> @@ -1197,6 +1197,13 @@ The following resources are available:
>    the cache allocation.
>    * `cat` instructs Xen to enable/disable Cache Allocation Technology.
>    * `cos_max` indicates the max value for COS ID.
> +* Code and Data Prioritization Technology (Broadwell and later). Information
> +  regarding the code cache and the data cache allocation. CDP is based on 
> CAT.
> +  * `cdp` instructs Xen to enable/disable Code and Data Prioritization. Note
> +    that `cos_max` of CDP is a little different from `cos_max` of CAT. With
> +    CDP, one COS will corespond two CBMs other than one with CAT, due to the
> +    sum of CBMs is fixed, that means actual `cos_max` in use will 
> automatically
> +    reduce to half when CDP is enabled.
>  
>  ### reboot
>  > `= t[riple] | k[bd] | a[cpi] | p[ci] | P[ower] | e[fi] | n[o] [, [w]arm | 
> [c]old]`
> diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
> index c0daa2e..e44ed8b 100644
> --- a/xen/arch/x86/psr.c
> +++ b/xen/arch/x86/psr.c
> @@ -21,9 +21,16 @@
>  
>  #define PSR_CMT        (1<<0)
>  #define PSR_CAT        (1<<1)
> +#define PSR_CDP        (1<<2)
>  
>  struct psr_cat_cbm {
> -    uint64_t cbm;
> +    union {
> +        uint64_t cbm;
> +        struct {
> +            uint64_t code;
> +            uint64_t data;
> +        };
> +    } u;

You can also drop this u which will further reduce the diff later in the
patch.

With this change, Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

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