Re: [Xen-devel] [PATCH 1/3] x86/p2m: tighten conditions of IOMMU mapping updates

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 21.09.15 at 16:02,  wrote:
> In the EPT case permission changes should also result in updates or
> TLB flushes.
> 
> In the NPT case the old MFN does not depend on the new entry being
> valid (but solely on the old one), and the need to update or TLB-flush
> again also depends on permission changes.
> 
> In the shadow mode case, iommu_hap_pt_share should be ignored.
> 
> Furthermore in the NPT/shadow case old intermediate page tables must
> be freed only after IOMMU side updates/flushes have got carried out.
> 
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> ---
> In addition to the fixes here it looks to me as if both EPT and
> NPT/shadow code lack invalidation of IOMMU side paging structure
> caches, i.e. further changes may be needed. Am I overlooking something?

Vendor-specific IOMMU maintainers,

not having Cc-ed you since the change doesn't explicitly touch
relevant code, I think I should make it explicit that we're expecting
input from you on this: Do current IOMMU implementations not do
any paging structure caching? Or else, what am I overlooking that
makes things work despite the apparently missing flushes? I'm
willing to try to do the necessary work, but we do need your input
also in the light of determining whether what is done here is enough
for current hardware (and hence for 4.6), with the remaining issue
just being a (for now) theoretical one.

Thanks, Jan


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