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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v7 2/3] x86: add domctl cmd to set/get CDP code/data CBM
CDP extends CAT and provides the capacity to control L3 code & data
cache. With CDP, one COS corresponds to two CMBs(code & data). cbm_type
is added to distinguish different CBM operations. Besides, new domctl
cmds are introdunced to support set/get CDP CBM. Some CAT functions to
operation CBMs are extended to support CDP.
Signed-off-by: He Chen <he.chen@xxxxxxxxxxxxxxx>
Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Reviewed-by: Chao Peng <chao.p.peng@xxxxxxxxxxxxxxx>
---
Changes in v7:
* amend function find_cos and pick_avail_cos to ignore reference count
for COS0
* code style
Changes in v6:
* remove variable need_write and restruct code in psr_set_l3_cbm
* remove redundant type == PSR_CBM_TYPE_L3 in psr_get_l3_cbm
Changes in v5:
* replace -EINVAL with -ENXIO when setting code/data CBM on CDP
disabled.
---
xen/arch/x86/domctl.c | 32 +++++++-
xen/arch/x86/psr.c | 181 ++++++++++++++++++++++++++++++++++----------
xen/include/asm-x86/psr.h | 12 ++-
xen/include/public/domctl.h | 4 +
4 files changed, 183 insertions(+), 46 deletions(-)
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index f8a559c..0f6fdb9 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -1168,12 +1168,40 @@ long arch_do_domctl(
{
case XEN_DOMCTL_PSR_CAT_OP_SET_L3_CBM:
ret = psr_set_l3_cbm(d, domctl->u.psr_cat_op.target,
- domctl->u.psr_cat_op.data);
+ domctl->u.psr_cat_op.data,
+ PSR_CBM_TYPE_L3);
+ break;
+
+ case XEN_DOMCTL_PSR_CAT_OP_SET_L3_CODE:
+ ret = psr_set_l3_cbm(d, domctl->u.psr_cat_op.target,
+ domctl->u.psr_cat_op.data,
+ PSR_CBM_TYPE_L3_CODE);
+ break;
+
+ case XEN_DOMCTL_PSR_CAT_OP_SET_L3_DATA:
+ ret = psr_set_l3_cbm(d, domctl->u.psr_cat_op.target,
+ domctl->u.psr_cat_op.data,
+ PSR_CBM_TYPE_L3_DATA);
break;
case XEN_DOMCTL_PSR_CAT_OP_GET_L3_CBM:
ret = psr_get_l3_cbm(d, domctl->u.psr_cat_op.target,
- &domctl->u.psr_cat_op.data);
+ &domctl->u.psr_cat_op.data,
+ PSR_CBM_TYPE_L3);
+ copyback = 1;
+ break;
+
+ case XEN_DOMCTL_PSR_CAT_OP_GET_L3_CODE:
+ ret = psr_get_l3_cbm(d, domctl->u.psr_cat_op.target,
+ &domctl->u.psr_cat_op.data,
+ PSR_CBM_TYPE_L3_CODE);
+ copyback = 1;
+ break;
+
+ case XEN_DOMCTL_PSR_CAT_OP_GET_L3_DATA:
+ ret = psr_get_l3_cbm(d, domctl->u.psr_cat_op.target,
+ &domctl->u.psr_cat_op.data,
+ PSR_CBM_TYPE_L3_DATA);
copyback = 1;
break;
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 5ddeb2b..0083115 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -293,14 +293,40 @@ int psr_get_cat_l3_info(unsigned int socket, uint32_t
*cbm_len,
return 0;
}
-int psr_get_l3_cbm(struct domain *d, unsigned int socket, uint64_t *cbm)
+int psr_get_l3_cbm(struct domain *d, unsigned int socket,
+ uint64_t *cbm, enum cbm_type type)
{
struct psr_cat_socket_info *info = get_cat_socket_info(socket);
+ bool_t cdp_enabled = cdp_is_enabled(socket);
if ( IS_ERR(info) )
return PTR_ERR(info);
- *cbm = info->cos_to_cbm[d->arch.psr_cos_ids[socket]].cbm;
+ switch ( type )
+ {
+ case PSR_CBM_TYPE_L3:
+ if ( cdp_enabled )
+ return -EXDEV;
+ *cbm = info->cos_to_cbm[d->arch.psr_cos_ids[socket]].cbm;
+ break;
+
+ case PSR_CBM_TYPE_L3_CODE:
+ if ( !cdp_enabled )
+ *cbm = info->cos_to_cbm[d->arch.psr_cos_ids[socket]].cbm;
+ else
+ *cbm = info->cos_to_cbm[d->arch.psr_cos_ids[socket]].code;
+ break;
+
+ case PSR_CBM_TYPE_L3_DATA:
+ if ( !cdp_enabled )
+ *cbm = info->cos_to_cbm[d->arch.psr_cos_ids[socket]].cbm;
+ else
+ *cbm = info->cos_to_cbm[d->arch.psr_cos_ids[socket]].data;
+ break;
+
+ default:
+ ASSERT_UNREACHABLE();
+ }
return 0;
}
@@ -331,19 +357,34 @@ static bool_t psr_check_cbm(unsigned int cbm_len,
uint64_t cbm)
struct cos_cbm_info
{
unsigned int cos;
- uint64_t cbm;
+ uint64_t cbm_code;
+ uint64_t cbm_data;
+ bool_t cdp;
};
static void do_write_l3_cbm(void *data)
{
struct cos_cbm_info *info = data;
- wrmsrl(MSR_IA32_PSR_L3_MASK(info->cos), info->cbm);
+ if ( info->cdp )
+ {
+ wrmsrl(MSR_IA32_PSR_L3_MASK_CODE(info->cos), info->cbm_code);
+ wrmsrl(MSR_IA32_PSR_L3_MASK_DATA(info->cos), info->cbm_data);
+ }
+ else
+ wrmsrl(MSR_IA32_PSR_L3_MASK(info->cos), info->cbm_code);
}
-static int write_l3_cbm(unsigned int socket, unsigned int cos, uint64_t cbm)
+static int write_l3_cbm(unsigned int socket, unsigned int cos,
+ uint64_t cbm_code, uint64_t cbm_data, bool_t cdp)
{
- struct cos_cbm_info info = { .cos = cos, .cbm = cbm };
+ struct cos_cbm_info info =
+ {
+ .cos = cos,
+ .cbm_code = cbm_code,
+ .cbm_data = cbm_data,
+ .cdp = cdp,
+ };
if ( socket == cpu_to_socket(smp_processor_id()) )
do_write_l3_cbm(&info);
@@ -359,10 +400,48 @@ static int write_l3_cbm(unsigned int socket, unsigned int
cos, uint64_t cbm)
return 0;
}
-int psr_set_l3_cbm(struct domain *d, unsigned int socket, uint64_t cbm)
+static int find_cos(struct psr_cat_cbm *map, unsigned int cos_max,
+ uint64_t cbm_code, uint64_t cbm_data, bool_t cdp_enabled)
+{
+ unsigned int cos;
+
+ for ( cos = 0; cos <= cos_max; cos++ )
+ {
+ if ( (map[cos].ref || cos == 0) &&
+ ((!cdp_enabled && map[cos].cbm == cbm_code) ||
+ (cdp_enabled && map[cos].code == cbm_code &&
+ map[cos].data == cbm_data)) )
+ return cos;
+ }
+
+ return -ENOENT;
+}
+
+static int pick_avail_cos(struct psr_cat_cbm *map, unsigned int cos_max,
+ unsigned int old_cos)
+{
+ unsigned int cos;
+
+ /* If old cos is referred only by the domain, then use it. */
+ if ( map[old_cos].ref == 1 && old_cos != 0 )
+ return old_cos;
+
+ /* Find an unused one other than cos0. */
+ for ( cos = 1; cos <= cos_max; cos++ )
+ if ( map[cos].ref == 0 )
+ return cos;
+
+ return -ENOENT;
+}
+
+int psr_set_l3_cbm(struct domain *d, unsigned int socket,
+ uint64_t cbm, enum cbm_type type)
{
- unsigned int old_cos, cos;
- struct psr_cat_cbm *map, *found = NULL;
+ unsigned int old_cos, cos_max;
+ int cos, ret;
+ uint64_t cbm_data, cbm_code;
+ bool_t cdp_enabled = cdp_is_enabled(socket);
+ struct psr_cat_cbm *map;
struct psr_cat_socket_info *info = get_cat_socket_info(socket);
if ( IS_ERR(info) )
@@ -371,53 +450,71 @@ int psr_set_l3_cbm(struct domain *d, unsigned int socket,
uint64_t cbm)
if ( !psr_check_cbm(info->cbm_len, cbm) )
return -EINVAL;
+ if ( !cdp_enabled && (type == PSR_CBM_TYPE_L3_CODE ||
+ type == PSR_CBM_TYPE_L3_DATA) )
+ return -ENXIO;
+
+ cos_max = info->cos_max;
old_cos = d->arch.psr_cos_ids[socket];
map = info->cos_to_cbm;
- spin_lock(&info->cbm_lock);
-
- for ( cos = 0; cos <= info->cos_max; cos++ )
+ switch ( type )
{
- /* If still not found, then keep unused one. */
- if ( !found && cos != 0 && map[cos].ref == 0 )
- found = map + cos;
- else if ( map[cos].cbm == cbm )
- {
- if ( unlikely(cos == old_cos) )
- {
- ASSERT(cos == 0 || map[cos].ref != 0);
- spin_unlock(&info->cbm_lock);
- return 0;
- }
- found = map + cos;
- break;
- }
- }
+ case PSR_CBM_TYPE_L3:
+ cbm_code = cbm;
+ cbm_data = cbm;
+ break;
- /* If old cos is referred only by the domain, then use it. */
- if ( !found && map[old_cos].ref == 1 )
- found = map + old_cos;
+ case PSR_CBM_TYPE_L3_CODE:
+ cbm_code = cbm;
+ cbm_data = map[old_cos].data;
+ break;
- if ( !found )
- {
- spin_unlock(&info->cbm_lock);
- return -EOVERFLOW;
+ case PSR_CBM_TYPE_L3_DATA:
+ cbm_code = map[old_cos].code;
+ cbm_data = cbm;
+ break;
+
+ default:
+ ASSERT_UNREACHABLE();
}
- cos = found - map;
- if ( found->cbm != cbm )
+ spin_lock(&info->cbm_lock);
+ cos = find_cos(map, cos_max, cbm_code, cbm_data, cdp_enabled);
+ if ( cos >= 0 )
{
- int ret = write_l3_cbm(socket, cos, cbm);
-
- if ( ret )
+ if ( cos == old_cos )
{
spin_unlock(&info->cbm_lock);
- return ret;
+ return 0;
+ }
+ }
+ else
+ {
+ cos = pick_avail_cos(map, cos_max, old_cos);
+ if ( cos < 0 )
+ {
+ spin_unlock(&info->cbm_lock);
+ return cos;
+ }
+
+ /* We try to avoid writing MSR. */
+ if ( (cdp_enabled &&
+ (map[cos].code != cbm_code || map[cos].data != cbm_data)) ||
+ (!cdp_enabled && map[cos].cbm != cbm_code) )
+ {
+ ret = write_l3_cbm(socket, cos, cbm_code, cbm_data, cdp_enabled);
+ if ( ret )
+ {
+ spin_unlock(&info->cbm_lock);
+ return ret;
+ }
+ map[cos].code = cbm_code;
+ map[cos].data = cbm_data;
}
- found->cbm = cbm;
}
- found->ref++;
+ map[cos].ref++;
map[old_cos].ref--;
spin_unlock(&info->cbm_lock);
diff --git a/xen/include/asm-x86/psr.h b/xen/include/asm-x86/psr.h
index 5faeaaf..57f47e9 100644
--- a/xen/include/asm-x86/psr.h
+++ b/xen/include/asm-x86/psr.h
@@ -46,6 +46,12 @@ struct psr_cmt {
struct psr_cmt_l3 l3;
};
+enum cbm_type {
+ PSR_CBM_TYPE_L3,
+ PSR_CBM_TYPE_L3_CODE,
+ PSR_CBM_TYPE_L3_DATA,
+};
+
extern struct psr_cmt *psr_cmt;
static inline bool_t psr_cmt_enabled(void)
@@ -59,8 +65,10 @@ void psr_ctxt_switch_to(struct domain *d);
int psr_get_cat_l3_info(unsigned int socket, uint32_t *cbm_len,
uint32_t *cos_max, uint32_t *flags);
-int psr_get_l3_cbm(struct domain *d, unsigned int socket, uint64_t *cbm);
-int psr_set_l3_cbm(struct domain *d, unsigned int socket, uint64_t cbm);
+int psr_get_l3_cbm(struct domain *d, unsigned int socket,
+ uint64_t *cbm, enum cbm_type type);
+int psr_set_l3_cbm(struct domain *d, unsigned int socket,
+ uint64_t cbm, enum cbm_type type);
int psr_domain_init(struct domain *d);
void psr_domain_free(struct domain *d);
diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h
index ae241f2..86cd0ab 100644
--- a/xen/include/public/domctl.h
+++ b/xen/include/public/domctl.h
@@ -1057,6 +1057,10 @@ DEFINE_XEN_GUEST_HANDLE(xen_domctl_monitor_op_t);
struct xen_domctl_psr_cat_op {
#define XEN_DOMCTL_PSR_CAT_OP_SET_L3_CBM 0
#define XEN_DOMCTL_PSR_CAT_OP_GET_L3_CBM 1
+#define XEN_DOMCTL_PSR_CAT_OP_SET_L3_CODE 2
+#define XEN_DOMCTL_PSR_CAT_OP_SET_L3_DATA 3
+#define XEN_DOMCTL_PSR_CAT_OP_GET_L3_CODE 4
+#define XEN_DOMCTL_PSR_CAT_OP_GET_L3_DATA 5
uint32_t cmd; /* IN: XEN_DOMCTL_PSR_CAT_OP_* */
uint32_t target; /* IN */
uint64_t data; /* IN/OUT */
--
1.9.1
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