Re: [Xen-devel] [PATCH 03/13] x86/hvm: Collect information of TSC scaling ratio

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 28.09.15 at 09:13, <haozhong.zhang@xxxxxxxxx> wrote:
> Both VMX TSC scaling and SVM TSC ratio use the 64-bit TSC scaling ratio,
> but the number of fractional bits of the ratio is different between VMX
> and SVM. This patch makes the architecture code to collect the number of
> fractional bits and other related information into fields of struct
> hvm_function_table so that they can be used in the common code.
> 
> Signed-off-by: Haozhong Zhang <haozhong.zhang@xxxxxxxxx>
> ---
>  xen/arch/x86/hvm/svm/svm.c        |  9 +++++++++
>  xen/arch/x86/hvm/vmx/vmx.c        |  2 ++
>  xen/include/asm-x86/hvm/hvm.h     | 13 +++++++++++++
>  xen/include/asm-x86/hvm/svm/svm.h |  1 +
>  4 files changed, 25 insertions(+)
> 
> diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
> index 8de41fa..94b9618 100644
> --- a/xen/arch/x86/hvm/svm/svm.c
> +++ b/xen/arch/x86/hvm/svm/svm.c
> @@ -1428,6 +1428,9 @@ const struct hvm_function_table * __init 
> start_svm(void)
>      if ( !cpu_has_svm_nrips )
>          clear_bit(SVM_FEATURE_DECODEASSISTS, &svm_feature_flags);
>  
> +    if ( cpu_has_tsc_ratio )
> +        svm_function_table.tsc_scaling_supported = 1;
> +
>  #define P(p,s) if ( p ) { printk(" - %s\n", s); printed = 1; }
>      P(cpu_has_svm_npt, "Nested Page Tables (NPT)");
>      P(cpu_has_svm_lbrv, "Last Branch Record (LBR) Virtualisation");
> @@ -2283,6 +2286,12 @@ static struct hvm_function_table __initdata 
> svm_function_table = {
>      .nhvm_vmcx_hap_enabled = nsvm_vmcb_hap_enabled,
>      .nhvm_intr_blocked = nsvm_intr_blocked,
>      .nhvm_hap_walk_L1_p2m = nsvm_hap_walk_L1_p2m,
> +
> +    .tsc_scaling_supported       = 0,

This is not needed.

> --- a/xen/arch/x86/hvm/vmx/vmx.c
> +++ b/xen/arch/x86/hvm/vmx/vmx.c
> @@ -1968,6 +1968,8 @@ static struct hvm_function_table __initdata 
> vmx_function_table = {
>      .altp2m_vcpu_update_vmfunc_ve = vmx_vcpu_update_vmfunc_ve,
>      .altp2m_vcpu_emulate_ve = vmx_vcpu_emulate_ve,
>      .altp2m_vcpu_emulate_vmfunc = vmx_vcpu_emulate_vmfunc,
> +    /* support for VMX RDTSC(P) scaling */
> +    .tsc_scaling_supported       = 0,

Same here.

> --- a/xen/include/asm-x86/hvm/svm/svm.h
> +++ b/xen/include/asm-x86/hvm/svm/svm.h
> @@ -96,6 +96,7 @@ extern u32 svm_feature_flags;
>  
>  /* TSC rate */
>  #define DEFAULT_TSC_RATIO       0x0000000100000000ULL
> +#define MAX_TSC_RATIO           0x000000ffffffffffULL
>  #define TSC_RATIO_RSVD_BITS     0xffffff0000000000ULL

How about 

#define MAX_TSC_RATIO           (~TSC_RATIO_RSVD_BITS)

? (But of course it's not really clear in which way this is to
be used as "maximum" without seeing the code using it. I.e.
it's not clear whether you don't really just mean to specify
all the valid bits in the MSR.)

Jan


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