Re: [Xen-devel] [PATCH v2 1/2] VT-d: Reduce spin timeout to 1ms, which can be boot-time changed.

["Xu, Quan" <quan.xu@xxxxxxxxx>]

On 11.12.2015 at 4:37pm, <Andrew Cooper> wrote:
> On 11/12/2015 02:09, Xu, Quan wrote:
> > On 11.12.2015 at 3:03pm, <andrew.cooper3@xxxxxxxxxx> wrote:
> >> On 10/12/15 09:33, Quan Xu wrote:
> >>> Signed-off-by: Quan Xu <quan.xu@xxxxxxxxx>


> >> This patch misses a second use of DMAR_OPERATION_TIMEOUT, in
> >> IOMMU_WAIT_OP() which in turn is used in a large number of locations.
> >> All of these locations equally need to be chopped down to a low
> >> number of milliseconds.
> > Andrew, thanks for your comments.
> >
> > I know that DMAR_OPERATION_TIMEOUT should be also chopped down to a
> low number of milliseconds.
> > As Kevin Tian mentioned in 'Revisit VT-d asynchronous flush issue', We
> > also confirmed with hardware team that 1ms is large enough for IOMMU
> internal flush.
> > So I can change DMAR_OPERATION_TIMEOUT from 1000 ms to 1 ms.
> 
> Ok - sounds good.
> 
> >
> > IOMMU_WAIT_OP() is only for VT-d registers read/write, and there is
> > also a panic. We need a further discussion whether or how to remove this
> panic.
> 
> We certainly should see about removing it.
> 

Agreed.

-Quan


> > I can send another patch set to fix it. in this patch set, I want to
> > focus on VT-d QI flush.
> 
> Agreed.
> 
> ~Andrew

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