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Re: [Xen-devel] [PATCH v2 0/2] Support of RO MMCFG access for PVH/HVMlite dom0s

On 12/18/2015 08:02 AM, Andrew Cooper wrote:
On 18/12/15 10:11, Jan Beulich wrote:
On 17.12.15 at 21:22, <boris.ostrovsky@xxxxxxxxxx> wrote:
* Left non-MMCFG RO accesses unhandled (we havent't encountered those accesses
   yet with PVH dom0 and it's probably better to fault on them and investigate
   whether they are guest's issues).
I seriously question this being a good approach,
I concur.  All accesses should be terminated somehow, even if this is
the hypervisor dropping writes and completing reads with ~0's.

This is the expected behaviour from the x86 architecture.

OK, I'll add that in.

To answer Jan's question, I did try 'vga=keep' and that worked fine. (I couldn't test AMD IOMMU because we don't support PVH there and I don't have the other HW that he mentioned).


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