Re: [Xen-devel] [PATCH RFC 02/31] tools/libxc: Use public/featureset.h for cpuid policy generation

[Ian Campbell <ian.campbell@xxxxxxxxxx>]

On Tue, 2016-01-05 at 14:23 +0000, Andrew Cooper wrote:
> On 05/01/16 14:18, Ian Campbell wrote:
> > On Tue, 2016-01-05 at 14:17 +0000, Andrew Cooper wrote:
> > > On 05/01/16 14:13, Ian Campbell wrote:
> > > > On Tue, 2015-12-22 at 09:29 -0700, Jan Beulich wrote:
> > > > > > > > On 16.12.15 at 22:24, <andrew.cooper3@xxxxxxxxxx> wrote:
> > > > > > --- a/xen/include/public/arch-x86/featureset.h
> > > > > > +++ b/xen/include/public/arch-x86/featureset.h
> > > > > > @@ -163,6 +163,7 @@
> > > > > > Â
> > > > > > Â/* Intel-defined CPU features, CPUID level 0x00000007:0.ebx,
> > > > > > word
> > > > > > 5 */
> > > > > > Â#define X86_FEATURE_FSGSBASEÂÂÂÂÂÂ( 5*32+ 0) /*
> > > > > > {RD,WR}{FS,GS}BASE
> > > > > > instructions */
> > > > > > +#define X86_FEATURE_TSC_ADJUSTÂÂÂÂ( 5*32+ 1) /* TSC_ADJUST MSR
> > > > > > available */
> > > > > This would probably better go into patch 1.
> > > > Tools would then see this defined twice with only patch 1 applied,
> > > > and
> > > > since the value is actually different I think the compiler will
> > > > complain.
> > > > 
> > > > -#define X86_FEATURE_TSC_ADJUSTÂÂÂ1 /* Tsc thread offset */
> > > > +#define X86_FEATURE_TSC_ADJUSTÂÂÂÂ( 5*32+ 1) /* TSC_ADJUST MSR
> > > > available */
> > > > 
> > > > The comment change seems to be a semantic one? Or was it wrong
> > > > beofre?
> > > Changing patch 1 won't affect the compilation of libxc.ÂÂObserve in
> > > the
> > > penultimate hunk that I also change the #include
> > Ah yes.
> > 
> > What about my comment on the comment changing?
> 
> Ah yes - the changes are just semantic.ÂÂAlso observe that the same hunk
> also modifies the libxc macros to modulo 32.

I'm not talking about the value at all, since I realised that the masking
makes the values the same. I'm talking about the /* comment */ next to it
which has also changed.

> In the end, both the hypervisor and libxc are dealing with
> hardware-specified bits in registers.ÂÂThis patch is no resulting change
> to behaviour.

But do "Tsc thread offset" and "TSC_ADJUST MSR available" mean the same
thing? Or was "Tsc thread offset" previously actively wrong or misleading
in some way?

Ian.Â


_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
http://lists.xen.org/xen-devel