Re: [Xen-devel] [PATCHv2 1/3] x86/fpu: improve check for XSAVE* not writing FIP/FDP fields

["Lai, Paul C" <paul.c.lai@xxxxxxxxx>]

Jan:

We have an answer from the architects:

"We can confirm that our CPUs do treat FIP as a 48-bit pointer.  When loaded by 
one of the restore instructions, bit 47 is sign-extended into bits 63:48, 
making the result canonical.  As a result, the save instructions will always 
save a canonical address for FIP."

Thanks for your patience,
-Paul

-----Original Message-----
From: xen-devel-bounces@xxxxxxxxxxxxx [mailto:xen-devel-bounces@xxxxxxxxxxxxx] 
On Behalf Of Jan Beulich
Sent: Wednesday, February 24, 2016 2:50 AM
Subject: Re: [Xen-devel] [PATCHv2 1/3] x86/fpu: improve check for XSAVE* not 
writing FIP/FDP fields

>>> On 24.02.16 at 11:37, <kevin.tian@xxxxxxxxx> wrote:
> Sorry I didn't quite get the question here. Could anyone of you write 
> down a standalone description of the problem then I can forward 
> internally to confirm since my translation might be inaccurate here?

What we'd like to get formally stated is whether FIP is guaranteed to be 
treated as 48-bit pointer, which upon loading/storing by 64-bit 
{F,}X{XSAVE,RSTOR} will get truncated/canonicalized. With FDP being a full 
64-bit pointer on Intel CPUs (but only a 48 bit one on AMD ones), and both your 
and their manuals implicitly describing both as full 64-bit fields, FIP 
potentially also being a full 64-bit field on past, present, or future CPUs 
would render David's intended code improvement unsafe.

Jan


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