Re: [Xen-devel] [PATCH v6] x86/hvm/viridian: Enable APIC assist enlightenment

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 18.03.16 at 11:32, <paul.durrant@xxxxxxxxxx> wrote:
> @@ -278,6 +281,53 @@ static void teardown_apic_assist(struct vcpu *v)
>      put_page_and_type(page);
>  }
>  
> +void viridian_start_apic_assist(struct vcpu *v, int vector)
> +{
> +    uint32_t *va = v->arch.hvm_vcpu.viridian.apic_assist.va;
> +
> +    if ( !va )
> +        return;
> +
> +    /*
> +     * If there is already an assist pending then something has gone
> +     * wrong and the VM will most likely hang so force a crash now
> +     * to make the problem clear.
> +     */
> +    if ( v->arch.hvm_vcpu.viridian.apic_assist.vector >= 0 )
> +        domain_crash(v->domain);
> +
> +    v->arch.hvm_vcpu.viridian.apic_assist.vector = vector;

Considering the osstest failures I (see also IRC) I now wonder
what happens if the guest gets migrated while a vCPU has this
field holding a valid vector, namely how ...

> @@ -1170,10 +1183,27 @@ int vlapic_has_pending_irq(struct vcpu *v)
>           !nestedhvm_vcpu_in_guestmode(v) )
>          return irr;
>  
> +    /*
> +     * If APIC assist was used then there may have been no EOI so
> +     * we need to clear the requisite bit from the ISR here, before
> +     * comparing with the IRR.
> +     */
> +    vector = viridian_complete_apic_assist(v);
> +    if ( vector != -1 )
> +        vlapic_clear_vector(vector, &vlapic->regs->data[APIC_ISR]);

... this would then be taken care of on the new host.

Jan


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