Re: [Xen-devel] [PATCH v3] arm: Fix asynchronous aborts (SError exceptions) due to bogus PTEs

[Julien Grall <julien.grall@xxxxxxx>]

On 06/04/16 19:57, Shanker Donthineni wrote:
> Hi Julien/Stefano,
Hi Shanker,

> Any other comments to be addressed? Please propose an alternative
> solution to fix the problem if this patch changes are not appropriate.
All the comments have been addressed.

> On 03/28/2016 11:46 PM, Shanker Donthineni wrote:
> > From: Vikram Sethi <vikrams@xxxxxxxxxxxxxx>
> >
> > ARMv8 architecture allows performing prefetch data/instructions
> > from memory locations marked as normal memory. Prefetch does not
> > mean that the data/instruction has to be used/executed in code
> > flow. All PTEs that appear to be valid to MMU must contain valid
> > physical address with proper attributes otherwise MMU table walk
> > might cause imprecise asynchronous aborts.
> >
> > The way current XEN code is preparing page tables for frametable
> > and xenheap memory can create bogus PTEs. This patch fixes the
> > issue by clearing page table memory before populating EL2 L0/L1
> > PTEs. Without this patch XEN crashes on Qualcomm Technologies
> > server chips due to asynchronous aborts.
> >
> > The speculative/prefetch feature explanation is scattered everywhere
> > in ARM specification but below two sections have useful information.
> >
> > E2.8 Memory types and attributes (ver DDI0487A_h)
> > G4.12.6 External abort on a translation table walk (ver DDI0487A_h)
> >
> > Signed-off-by: Vikram Sethi <vikrams@xxxxxxxxxxxxxx>
> > Signed-off-by: Shanker Donthineni <shankerd@xxxxxxxxxxxxxx>
Acked-by: Julien Grall <julien.grall@xxxxxxx>

Regards,

--
Julien Grall

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