Re: [Xen-devel] [PATCH V8 2/3] drivers/pl011: Use combination of UARTRIS and UARTMSC instead of UARTMIS

[Julien Grall <julien.grall@xxxxxxx>]

Hello Shanker,

On 08/06/16 14:28, Shanker Donthineni wrote:
> The Masked interrupt status register (UARTMIS) is not described in ARM
> SBSA 2.x document. Anding of two registers UARTMSC and UARTRIS values
> gives the same information as register UARTMIS.
>
> UARTRIS, UARTMSC and UARTMIS definitions are found in PrimeCell UART
> PL011 (Revision: r1p4).
>   - 3.3.10 Interrupt mask set/clear register, UARTIMSC
>   - 3.3.11 Raw interrupt status register, UARTRIS
>   - 3.3.12 Masked interrupt status register, UARTMIS
>
> This change is necessary for driver to be SBSA compliant v2.x without
> affecting the current driver functionality.
>
> Signed-off-by: Shanker Donthineni <shankerd@xxxxxxxxxxxxxx>
> ---
> Changes since v7:
>   Moved comment 'To compatible with SBSA v2.x document, all accesses should be 
> 32-bit' to #3
>
> Changes since v1:
>   Added a new function to return an interrupt status.
>
>   xen/drivers/char/pl011.c | 10 ++++++++--
>   1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/xen/drivers/char/pl011.c b/xen/drivers/char/pl011.c
> index 6a3c21b..a2f929b 100644
> --- a/xen/drivers/char/pl011.c
> +++ b/xen/drivers/char/pl011.c
> @@ -53,11 +53,17 @@ static struct pl011 {
>   #define pl011_read(uart, off)           readl((uart)->regs + (off))
>   #define pl011_write(uart, off,val)      writel((val), (uart)->regs + (off))
>
> +static unsigned int pl011_intr_status(struct pl011 *uart)
> +{
> +    /* UARTMIS is not documented in SBSA v2.x, so using UARTRIS/UARTIMSC */
s/so using/so use/

Also missing full stop at the end of the comment.

> +    return ( pl011_read(uart, RIS) & pl011_read(uart, IMSC) );
No space after the first parenthesis and before the last one.

With these changes:

Reviewed-by: Julien Grall <julien.grall@xxxxxxx>

Regards,

--
Julien Grall

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