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Re: [Xen-devel] [PATCH 7/7] vm-event/arm: implement support for control-register write vm-events



Hello,

On 22/06/16 18:17, Julien Grall wrote:
On 22/06/16 17:35, Corneliu ZUZU wrote:

Julien,

Hello Corneliu,

I was trying to implement having HCR stored in arch_domain or arch_vcpu
as suggested above and I'm a bit confused about the code in
p2m_restore_state.
I'm hoping you can provide some feedback on this matter. Here's the
current implementation of the function:

     void p2m_restore_state(struct vcpu *n)
     {
         register_t hcr;

         hcr = READ_SYSREG(HCR_EL2);
         WRITE_SYSREG(hcr & ~HCR_VM, HCR_EL2);
         isb();

         p2m_load_VTTBR(n->domain);
         isb();

         if ( is_32bit_domain(n->domain) )
             hcr &= ~HCR_RW;
         else
             hcr |= HCR_RW;

         WRITE_SYSREG(n->arch.sctlr, SCTLR_EL1);
         isb();

         WRITE_SYSREG(hcr, HCR_EL2);
         isb();
     }

First of all, I see the HCR_VM bit being unset (=0) but I don't quite
understand why and even more peculiar is the fact that I couldn't find
any place where the bit is set (=1) again.

After the first write to HCR_EL2, "hcr" still have the VM bit set as we
only mask it. So the second write will re-set the VM bit.

I am not sure why the VM bit is unset/set in this function. I am not
able to find a paragraph justifying it in the ARM ARM. I have CCed some
ARM folks to check if I missed something.

After talking with different ARM folks, I confirm that it is not necessary to disable the HCR_VM before setting TTBR0.

Regards,

--
Julien Grall

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