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Re: [Xen-devel] [PATCH v4] x86/cpuid: AVX-512 Feature Detection




> -----Original Message-----
> From: Jan Beulich [mailto:JBeulich@xxxxxxxx]
> Sent: Tuesday, July 5, 2016 3:03 PM
> To: Kang, Luwei <luwei.kang@xxxxxxxxx>
> Cc: andrew.cooper3@xxxxxxxxxx; chao.p.peng@xxxxxxxxxxxxxxx; xen-
> devel@xxxxxxxxxxxxx
> Subject: RE: [PATCH v4] x86/cpuid: AVX-512 Feature Detection
> 
> >>> On 05.07.16 at 04:31, <luwei.kang@xxxxxxxxx> wrote:
> 
> First of all - please don't top post.
> 
> > What about remove the dependency between AVX2 and AVX512F ( AVX2:
> [AVX512F], ) ?
> 
> Yes, that's what I think we want, but we need Andrew's agreement here.
> 

Hi Andrew,  what is your opinion ?

> > From: Jan Beulich [mailto:JBeulich@xxxxxxxx]
> > Sent: Friday, July 1, 2016 3:56 PM
> >>>> On 30.06.16 at 07:50, <luwei.kang@xxxxxxxxx> wrote:
> >> --- a/xen/tools/gen-cpuid.py
> >> +++ b/xen/tools/gen-cpuid.py
> >> @@ -243,6 +243,17 @@ def crunch_numbers(state):
> >>          # AMD K6-2+ and K6-III processors shipped with 3DNow+, beyond
> the
> >>          # standard 3DNow in the earlier K6 processors.
> >>          _3DNOW: [_3DNOWEXT],
> >> +
> >> +        # AVX2 is an extension to AVX, providing mainly new integer
> instructions.
> >> +        # In principle, AVX512 only takes YMM register state as a
> prerequisite
> >> +        # and many AVX2 instructions are extended by AVX512F to 512-bit
> forms.
> >> +        AVX2: [AVX512F],
> >
> > I think this was meant to be "but" or "yet" instead of "and". And then
> > I'm not particularly happy about the asymmetry with AVX (which is not
> > dependent on SSE or any of its successors, despite extending many of
> > them to 256-bit forms). Plus e.g. FMA gets extended too, but isn't being
> made a dependency.
> > And quite opposite to that, at least some AVX2 instructions get
> > extended only by e.g. AVX512BW.
> > Nor are any of the extended forms listed to require other than the
> > AVX512* bits checked in the doc.
> >
> > Jan
> 
> 


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