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Re: [Xen-devel] [PATCH 6/9] xen/arm: Use check_workaround to handle the erratum 766422



Hi Stefano,

On 14/07/16 15:34, Stefano Stabellini wrote:
On Wed, 22 Jun 2016, Julien Grall wrote:
Currently, Xen is reading the MIDR everytime it has to check whether
the processor is affected by the erratum 766422.

This could take advantage of the new capability bitfields to detect
whether the processor is affected at boot time.

With this patch, the number of instructions to check the erratum is
going down from ~13 (including 2 loads and a co-processor access) to
~6 instructions (include 1 load).

The patch looks good but the midr bits were actually already stored in
cpu_data.  See:


-/* Erratum 766422: only Cortex A15 r0p4 is affected */
-#define cpu_has_erratum_766422()                             \
-    (unlikely(current_cpu_data.midr.bits == 0x410fc0f4))

We weren't really accessing MIDR every time. Am I missing something?

The wording in the commit message is not clear. By "accessing the MDIR every time" I meant that the stored MIDR is checked every single time.

current_cpu_data turns into a complex series of assembly instructions to get the data of the current CPU which involves 2 loads.

I will rewrite the commit message in the next version.

Cheers,

--
Julien Grall

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