[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v2 7/9] xen/arm: Allow DOM0 to set the IRQ type
On Wed, 20 Jul 2016, Julien Grall wrote: > Hi Stefano, > > On 20/07/2016 00:43, Stefano Stabellini wrote: > > On Thu, 14 Jul 2016, Julien Grall wrote: > > > void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n) > > > { > > > const unsigned long mask = r; > > > @@ -352,6 +368,7 @@ void vgic_enable_irqs(struct vcpu *v, uint32_t r, int > > > n) > > > unsigned long flags; > > > int i = 0; > > > struct vcpu *v_target; > > > + struct domain *d = v->domain; > > > > > > while ( (i = find_next_bit(&mask, 32, i)) < 32 ) { > > > irq = i + (32 * n); > > > @@ -366,6 +383,8 @@ void vgic_enable_irqs(struct vcpu *v, uint32_t r, int > > > n) > > > { > > > irq_set_affinity(p->desc, cpumask_of(v_target->processor)); > > > spin_lock_irqsave(&p->desc->lock, flags); > > > + if ( irq_type_set_by_domain(d) ) > > > + gic_set_irq_type(p->desc, vgic_get_virq_type(v, n, i)); > > > > The patch looks good, but we should probably set the type only for irq >= > > 32. > > It is not possible to route PPIs to a guest for the moment. I remembered that > Ian Campbell sent a series to route PPIs to the guest [1]. I would have to > look whether we still want this series upstream (I guess so). > > For the time being, I would prefer to add an ASSERT(irq >= 32). We could > handle PPI properly when it will be supported. Sure. _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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