Re: [Xen-devel] [PATCH] x86/32on64: misc adjustments to call gate emulation

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 01.09.16 at 13:31, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 29/08/16 14:57, Jan Beulich wrote:
>> - There's no 32-bit displacement in 16-bit addressing mode.
>> - It is wrong to ASSERT() anything on parts of an instruction fetched
>>   from guest memory.
>> - The two scaling bits of a SIB byte don't affect whether there is no
>>   scaled index register.
>>
>> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
>>
>> --- a/xen/arch/x86/traps.c
>> +++ b/xen/arch/x86/traps.c
>> @@ -3214,7 +3214,7 @@ static void emulate_gate_op(struct cpu_u
>>                              sib = insn_fetch(u8, base, eip, limit);
>>  
>>                              modrm = (modrm & ~7) | (sib & 7);
>> -                            if ( (sib >>= 3) != 4 )
>> +                            if ( ((sib >>= 3) & 7) != 4 )
>>                                  opnd_off = *(unsigned long *)
>>                                      decode_register(sib & 7, regs, 0);
>>                              opnd_off <<= sib >> 3;
> 
> Surely should shift sib by 6 rather than 3 here, so opnd_off doesn't
> have the index included in its scaling factor?

Not really - sib gets shifted right by 3 already in the line being
modified.

Jan


_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
https://lists.xen.org/xen-devel