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[Xen-devel] [ovmf baseline-only test] 67709: all pass



This run is configured for baseline tests only.

flight 67709 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/67709/

Perfect :-)
All tests in this flight passed as required
version targeted for testing:
 ovmf                 d947fbed72226011961e5e2691f09baebf128795
baseline version:
 ovmf                 dd82465a9f0f0beff0e4d74c6e3192b966853332

Last test of basis    67707  2016-09-13 23:20:39 Z    0 days
Testing same since    67709  2016-09-14 05:54:11 Z    0 days    1 attempts

------------------------------------------------------------
People who touched revisions under test:
  Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>

jobs:
 build-amd64-xsm                                              pass    
 build-i386-xsm                                               pass    
 build-amd64                                                  pass    
 build-i386                                                   pass    
 build-amd64-libvirt                                          pass    
 build-i386-libvirt                                           pass    
 build-amd64-pvops                                            pass    
 build-i386-pvops                                             pass    
 test-amd64-amd64-xl-qemuu-ovmf-amd64                         pass    
 test-amd64-i386-xl-qemuu-ovmf-amd64                          pass    


------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images

Logs, config files, etc. are available at
    http://osstest.xs.citrite.net/~osstest/testlogs/logs

Test harness code can be found at
    http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary


Push not applicable.

------------------------------------------------------------
commit d947fbed72226011961e5e2691f09baebf128795
Author: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>
Date:   Fri Sep 9 13:55:34 2016 +0100

    MdePkg/BaseMemoryLibOptDxe ARM|AARCH64: disallow use in SEC & PEI phases
    
    The new accelerated ARM and AARCH64 implementations take advantage of
    features that are only available when the MMU and Dcache are on. So
    restrict the use of this library to the DXE phase or later.
    
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>
    Reviewed-by: Liming Gao <liming.gao@xxxxxxxxx>

commit c86cd1e175fb3f3b545521c53fa751141abd1b2d
Author: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>
Date:   Fri Sep 2 12:34:22 2016 +0100

    MdePkg/BaseMemoryLibOptDxe: add accelerated AARCH64 routines
    
    This adds AARCH64 support to BaseMemoryLibOptDxe, based on the 
cortex-strings
    library. All string routines are accelerated except ScanMem16, ScanMem32,
    ScanMem64 and IsZeroBuffer, which can wait for another day. (Very few
    occurrences exist in the codebase)
    
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>
    Reviewed-by: Liming Gao <liming.gao@xxxxxxxxx>

commit a37f660599e8aefabf29a1ac9bef02ce55a3130c
Author: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>
Date:   Tue Sep 6 15:06:38 2016 +0100

    MdePkg/BaseMemoryLibOptDxe: add accelerated ARM routines
    
    This adds ARM support to BaseMemoryLibOptDxe, partially based on the
    cortex-strings library (ScanMem) and the existing CopyMem() implementation
    from BaseMemoryLibStm in ArmPkg.
    
    All string routines are accelerated except ScanMem16, ScanMem32,
    ScanMem64 and IsZeroBuffer, which can wait for another day. (Very few
    occurrences exist in the codebase)
    
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>
    Reviewed-by: Liming Gao <liming.gao@xxxxxxxxx>

commit 01f688be90f59cd1ea92195bd238e8d97295fbf1
Author: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>
Date:   Fri Sep 2 08:26:23 2016 +0100

    MdePkg/BaseMemoryLib: widen aligned accesses to 32 or 64 bits
    
    Since the default BaseMemoryLib should be callable from any context,
    including ones where unaligned accesses are not allowed, it implements
    InternalCopyMem() and InternalSetMem() using byte accesses only.
    However, especially in a context where the MMU is off, such narrow
    accesses may be disproportionately costly, and so if the size and
    alignment of the access allow it, use 32-bit or even 64-bit loads and
    stores (the latter may be beneficial even on a 32-bit architectures like
    ARM, which has load pair/store pair instructions)
    
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>
    Reviewed-by: Liming Gao <liming.gao@xxxxxxxxx>

commit 94a3845be698ddeed9d126363c755bd3bb13dd17
Author: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>
Date:   Tue Sep 13 15:13:31 2016 +0100

    ArmVirtPkg/FdtParser: avoid unaligned accesses with the MMU off
    
    When parsing the device tree to find the memory node, we are still running
    with the MMU off, which means unaligned memory accesses are not allowed.
    Since the FDT only mandates 32-bit alignment, 64-bit quantities are not
    guaranteed to appear naturally aligned, and so should be accessed using
    32-bit accesses instead.
    
    Reported-by: Julien Grall <julien.grall@xxxxxxx>
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx>
    Reviewed-by: Laszlo Ersek <lersek@xxxxxxxxxx>

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