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Re: [Xen-devel] [PATCH] x86/Intel: hide CPUID faulting capability from guests

On 16/09/16 07:32, Jan Beulich wrote:
We don't currently emulate it, so guests should not be misguided to
believe they can (try to) use it.

For now, simply return zero to guests for platform MSR reads, and only
accept (by discarding) writes of zero. If ever there will be bits we
can safely expose to guests, let's handle them by white listing.

(As a side note - according to SDM version 059 bit 31 is reserved on
all known families.)

Reported-by: Kyle Huey <me@xxxxxxxxxxxx>
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>

Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxx>, but I would also suggest putting in a d->arch.x86_vendor check against Intel as well.


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