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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 7/8] x86/emul: Support CPUID fauilting via a speculative MSR read
>>> On 05.12.16 at 11:09, <andrew.cooper3@xxxxxxxxxx> wrote:
> Jan: Probably worth waiting to rebase over your changes moving the
> architectrual defines elsewhere
I have no such changes yet; I only recall us discussing this would be
a good thing at some point.
> --- a/xen/arch/x86/hvm/emulate.c
> +++ b/xen/arch/x86/hvm/emulate.c
> @@ -1567,15 +1567,6 @@ int hvmemul_cpuid(
> unsigned int *edx,
> struct x86_emulate_ctxt *ctxt)
> {
> - /*
> - * x86_emulate uses this function to query CPU features for its own
> internal
> - * use. Make sure we're actually emulating CPUID before emulating CPUID
> - * faulting.
> - */
> - if ( ctxt->opcode == X86EMUL_OPC(0x0f, 0xa2) &&
> - hvm_check_cpuid_faulting(current) )
> - return X86EMUL_EXCEPTION;
With this gone, is hvm_check_cpuid_faulting() as useful function to
retain, considering it then has only one caller in VMX code?
Other than that
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
Would allow me to drop half a hunk from the pv privop patch, so I'd
be glad to see this go in soon.
Jan
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