On 06/12/16 14:11, Jan Beulich wrote:
First of all there are a number of secondary encodings both Intel and
AMD support, but which aren't formally documented.
Where did you get them from then?
(I'm fine with introducing these if they exist, but it would be good
to provide references if possible.)
@@ -3798,7 +3801,7 @@ x86_emulate(
emulate_fpu_insn_memdst("fnstcw", dst.val);
break;
default:
- goto cannot_emulate;
+ generate_exception_if(true, EXC_UD);
You can use generate_exception(EXC_UD); here, and several places
below.
}
}
break;
@@ -4035,6 +4044,7 @@ x86_emulate(
{
case 0xc0 ... 0xc7: /* faddp %stN */
case 0xc8 ... 0xcf: /* fmulp %stN */
+ case 0xd0 ... 0xd7: /* fcomp %stN (alternative encoding) */
case 0xd9: /* fcompp */
case 0xe0 ... 0xe7: /* fsubrp %stN */
case 0xe8 ... 0xef: /* fsubp %stN */
@@ -4043,7 +4053,7 @@ x86_emulate(
emulate_fpu_insn_stub(0xde, modrm);
break;
default:
- fail_if(modrm >= 0xc0);
+ generate_exception_if(ea.type != OP_MEM, EXC_UD);
ea.bytes = 2;
src = ""
if ( (rc = ops->read(src.mem.seg, src.mem.off, &src.val,
@@ -4090,13 +4100,19 @@ x86_emulate(
dst.reg = (unsigned long *)&_regs.eax;
emulate_fpu_insn_memdst("fnstsw", dst.val);
break;
+ case 0xc0 ... 0xc7: /* ffreep %stN */
This positioning looks wrong. ffreep doesn't appear to interact
with FEATURE_CMOV, or eflags. Did you mean to have it part of the
lower introduced block?
~Andrew
case 0xe8 ... 0xef: /* fucomip %stN */
case 0xf0 ... 0xf7: /* fcomip %stN */
vcpu_must_have_cmov();
emulate_fpu_insn_stub_eflags(0xdf, modrm);
break;
+ case 0xc8 ... 0xcf: /* fxch %stN (alternative encoding) */
+ case 0xd0 ... 0xd7: /* fstp %stN (alternative encoding) */
+ case 0xd8 ... 0xdf: /* fstp %stN (alternative encoding) */
+ emulate_fpu_insn_stub(0xdf, modrm);
+ break;
default:
- fail_if(modrm >= 0xc0);
+ generate_exception_if(ea.type != OP_MEM, EXC_UD);
switch ( modrm_reg & 7 )
{
case 0: /* fild m16i */
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