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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 2/4] xen/x86: Drop erronious barriers
On 07/12/2016 18:44, Stefano Stabellini wrote: On Wed, 7 Dec 2016, Julien Grall wrote: Andrew thinks that (on x86) there is actually nothing that CPU0 will be looking at, that has been set by CPU1. However looking at the code it is difficult to verify. There are many cpu notifiers and many things written by start_secondary. I would prefer to submit this patch, and be safe. I agree on this. Better be safe than hunting a bug later on.Although, I think I just found an example for ARM. The gic_cpu_id (see gic-v2.c) is stored per-cpu and initialized by each CPU at boot. gic_cpu_id is commonly used to send a SGI to a specific target. So we need to ensure that CPU0 will see this value before sending an SGI (see gicv2_send_SGI). Otherwise the SGI may go to the wild. While you are sending a patch, can you document in the code why the barrier is present? Cheers, -- Julien Grall _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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