[Xen-devel] [PATCH v4 3/4] x86/microcode/intel: Replace sync_core() with native_cpuid()

[Andy Lutomirski <luto@xxxxxxxxxx>]

The Intel microcode driver is using sync_core() to mean "do CPUID
with EAX=1".  I want to rework sync_core(), but first the Intel
microcode driver needs to stop depending on its current behavior.

Reported-by: Henrique de Moraes Holschuh <hmh@xxxxxxxxxx>
Acked-by: Borislav Petkov <bp@xxxxxxxxx>
Signed-off-by: Andy Lutomirski <luto@xxxxxxxxxx>
---
 arch/x86/kernel/cpu/microcode/intel.c | 26 +++++++++++++++++++++++---
 1 file changed, 23 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/microcode/intel.c 
b/arch/x86/kernel/cpu/microcode/intel.c
index cdc0deab00c9..e0981bb2a351 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -356,6 +356,26 @@ get_matching_model_microcode(unsigned long start, void 
*data, size_t size,
        return state;
 }
 
+static void cpuid_1(void)
+{
+       /*
+        * According to the Intel SDM, Volume 3, 9.11.7:
+        *
+        *   CPUID returns a value in a model specific register in
+        *   addition to its usual register return values. The
+        *   semantics of CPUID cause it to deposit an update ID value
+        *   in the 64-bit model-specific register at address 08BH
+        *   (IA32_BIOS_SIGN_ID). If no update is present in the
+        *   processor, the value in the MSR remains unmodified.
+        *
+        * Use native_cpuid -- this code runs very early and we don't
+        * want to mess with paravirt.
+        */
+       unsigned int eax = 1, ebx, ecx = 0, edx;
+
+       native_cpuid(&eax, &ebx, &ecx, &edx);
+}
+
 static int collect_cpu_info_early(struct ucode_cpu_info *uci)
 {
        unsigned int val[2];
@@ -385,7 +405,7 @@ static int collect_cpu_info_early(struct ucode_cpu_info 
*uci)
        native_wrmsrl(MSR_IA32_UCODE_REV, 0);
 
        /* As documented in the SDM: Do a CPUID 1 here */
-       sync_core();
+       cpuid_1();
 
        /* get the current revision from MSR 0x8B */
        native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
@@ -627,7 +647,7 @@ static int apply_microcode_early(struct ucode_cpu_info 
*uci, bool early)
        native_wrmsrl(MSR_IA32_UCODE_REV, 0);
 
        /* As documented in the SDM: Do a CPUID 1 here */
-       sync_core();
+       cpuid_1();
 
        /* get the current revision from MSR 0x8B */
        native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
@@ -927,7 +947,7 @@ static int apply_microcode_intel(int cpu)
        wrmsrl(MSR_IA32_UCODE_REV, 0);
 
        /* As documented in the SDM: Do a CPUID 1 here */
-       sync_core();
+       cpuid_1();
 
        /* get the current revision from MSR 0x8B */
        rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
-- 
2.9.3


_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
https://lists.xen.org/xen-devel