Re: [Xen-devel] [XTF PATCH 03/16] vvmx: test whether MSR_IA32_VMX_BASIC is set correctly

[Haozhong Zhang <haozhong.zhang@xxxxxxxxx>]

On 12/19/16 15:41 +0000, Andrew Cooper wrote:
> On 19/12/16 02:44, Haozhong Zhang wrote:
> > > > +        passed = false;
> > > > +    }
> > > > +
> > > > +    vmcs_size = (vmx_basic & VMX_BASIC_VMCS_SIZE_MASK) >> 32;
> > > > +    if ( vmcs_size > PAGE_SIZE )
> > > > +    {
> > > > +        xtf_failure("Fail: "
> > > > +                    "VMCS size (%"PRIu64") in MSR_IA32_VMX_BASIC is
> > > > > %ld\n",
> > > > +                    vmcs_size, PAGE_SIZE);
> > > > +        passed = false;
> > > > +    }
> > > > +    else if ( vmcs_size == 0 )
> > > > +    {
> > > > +        xtf_failure("Fail: VMCS size in MSR_IA32_VMX_BASIC cannot
> > > > be 0\n");
> > > > +        passed = false;
> > > > +    }
> > > > +
> > > > +    /* test is running on hvm64, so this bit should be 0 */
> > > > +    if ( vmx_basic & VMX_BASIC_32BIT_ADDRESSES )
> > > There is nothing in principle wrong with Xen setting this bit.  It would
> > > be odd certainly, but not erroneous.
> > The reason I added this test is because Intel SDM Vol 3, Appendix A.1
> > Basic VMX Information says "This bit (bit 48) is always 0 for
> > processors that support Intel 64 architecture."
> Right, and Xen, being 64bit only, can expect to find this bit always clear.
>
> > I don't know whether there is SW in real world that depends on the
> > consistency between this bit and Intel SDM, but if there is any, it
> > might be confused by an odd configuration. So I think it's still worth
> > to keep such test.
> It is a valid administrator choice to restrict a VM to 32bit-only by
> hiding the long mode bit.  Under those circumstances, it would be
> logical to expect this bit to be set in the virtual environment, despite
> not being required at the physical level.
If we want to limit the L1 hypervisor to only use 32-bit VMCS/VMXON
address, I think the right way is to limit the L1 vcpu's physical
address width to 32, instead of introducing spec inconsistency, though
it also limits the physical address space that can be used by L1
hypervisor.

Thanks,
Haozhong

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