[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [RFC PATCH 6/9] x86/SVM: Add AVIC vmexit handlers
>>> On 19.09.16 at 07:52, <suravee.suthikulpanit@xxxxxxx> wrote: > +void svm_avic_vmexit_do_incomp_ipi(struct cpu_user_regs *regs) > +{ > + struct vcpu *v = current; Please name such variables "curr", which at once avoids the need for the unusual name ... > + struct vmcb_struct *vmcb = v->arch.hvm_svm.vmcb; > + u32 icrh = vmcb->exitinfo1 >> 32; > + u32 icrl = vmcb->exitinfo1; > + u32 id = vmcb->exitinfo2 >> 32; > + u32 index = vmcb->exitinfo2 && 0xFF; > + > + dprintk(XENLOG_DEBUG, "SVM: %s: cpu=%#x, vcpu=%#x, " > + "icrh:icrl=%#010x:%08x, id=%u, index=%u\n", > + __func__, v->processor, v->vcpu_id, icrh, icrl, id, index); > + > + switch ( id ) > + { > + case AVIC_INCMP_IPI_ERR_INVALID_INT_TYPE: > + /* > + * AVIC hardware handles the generation of > + * IPIs when the specified Message Type is Fixed > + * (also known as fixed delivery mode) and > + * the Trigger Mode is edge-triggered. The hardware > + * also supports self and broadcast delivery modes > + * specified via the Destination Shorthand(DSH) > + * field of the ICRL. Logical and physical APIC ID > + * formats are supported. All other IPI types cause > + * a #VMEXIT, which needs to emulated. > + */ > + vlapic_reg_write(v, APIC_ICR2, icrh); > + vlapic_reg_write(v, APIC_ICR, icrl); > + break; > + case AVIC_INCMP_IPI_ERR_TARGET_NOT_RUN: > + { > + /* > + * At this point, we expect that the AVIC HW has already > + * set the appropriate IRR bits on the valid target > + * vcpus. So, we just need to kick the appropriate vcpu. > + */ > + struct vcpu *c; here. > + struct domain *d = v->domain; (This would then become currd.) > +/*************************************************************** > + * AVIC NOACCEL VMEXIT > + */ > +#define GET_APIC_LOGICAL_ID(x) (((x) >> 24) & 0xFFu) GET_xAPIC_ID()? Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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