Re: [Xen-devel] [PATCH 5/8] x86emul: support TBM insns

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 13.01.17 at 19:48, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 13/01/17 15:32, Jan Beulich wrote:
>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>> @@ -1355,6 +1355,7 @@ static bool vcpu_has(
>>  #define vcpu_has_cr8_legacy()  vcpu_has(0x80000001, ECX,  4, ctxt, ops)
>>  #define vcpu_has_lzcnt()       vcpu_has(0x80000001, ECX,  5, ctxt, ops)
>>  #define vcpu_has_misalignsse() vcpu_has(0x80000001, ECX,  7, ctxt, ops)
>> +#define vcpu_has_tbm()         vcpu_has(0x80000001, ECX, 21, ctxt, ops)
>>  #define vcpu_has_bmi1()        vcpu_has(         7, EBX,  3, ctxt, ops)
>>  #define vcpu_has_hle()         vcpu_has(         7, EBX,  4, ctxt, ops)
>>  #define vcpu_has_bmi2()        vcpu_has(         7, EBX,  8, ctxt, ops)
>> @@ -6014,6 +6015,85 @@ x86_emulate(
>>              asm ( "rorl %b1,%k0" : "=g" (dst.val) : "c" (imm1), "0" 
>> (src.val) );
>>          break;
>>  
>> +    case X86EMUL_OPC(0x8f09, 0x01): /* XOP Grp1 */
> 
> Surely this calls for the introduction of X86EMUL_OPC_XOP_* to match
> their VEX/EVEX counterparts?

Do really you think

    case X86EMUL_OPC_XOP(09, 0x01): /* XOP Grp1 */

or

    case X86EMUL_OPC_XOP09(0x01): /* XOP Grp1 */

are any better? Iirc you had asked this same question already
when the opcode canonicalization patch was under review. The
situation hasn't changed: The nothing/VEX/EVEX distinction is
needed because the same base opcode may have (slightly or
significantly) different meaning depending on which of the three
(or four, if we also considered MVEX) encodings are being used.
There's no such duplicate meaning for XOP encodings.

Jan


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