Re: [Xen-devel] [PATCH] arm/monitor: flush the icache during SMC traps

[Razvan Cojocaru <rcojocaru@xxxxxxxxxxxxxxx>]

On 01/25/2017 10:02 PM, Tamas K Lengyel wrote:
> During an SMC trap it is possible that the user may change the memory
> from where the SMC was fetched. However, without flushing the icache
> the SMC may still trigger if the pCPU was idle during the trap. Flush
> the icache to ensure consistency.
> 
> Signed-off-by: Tamas K Lengyel <tamas.lengyel@xxxxxxxxxxxx>

Fair enough, assuming the ARM maintainers have no objections:

Acked-by: Razvan Cojocaru <rcojocaru@xxxxxxxxxxxxxxx>


Thanks,
Razvan


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