Re: [Xen-devel] [PATCH v4] xen/arm: flush icache as well when XEN_DOMCTL_cacheflush is issued

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 27/01/17 23:53, Stefano Stabellini wrote:
> On Fri, 27 Jan 2017, Julien Grall wrote:
>> On 27/01/2017 20:41, Stefano Stabellini wrote:
>> For the second instance, we have no other choice.
> Most alloc_heap_pages (alloc_xenheap_pages and alloc_domheap_pages) are
> done at domain initialization, so they would also be taken care by
> flushing the instruction cache before the domain is running. There are
> only very few exceptions to that, the main one being ballooning, and we
> need another icache flush in that case. But I think we should avoid
> doing global icache flushes every time alloc_heap_pages is called.

There is now d->creation_finished becomes true when the systemcontroler
pause count first drops to 0.  (i.e. the point at which the vcpus can
first start executing.)

This is used in the common memory code (populate_physmap() specifically)
to avoid TLB flushes.  I'd expect ARM can reuse it to avoid cache
flushes during domain construction as well.

~Andrew

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