[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Xen-devel] [PATCH 2/4] x86/setup: Minor cleanup to host SYSCALL MSR handling



>>> On 13.02.17 at 16:26, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 13/02/17 15:19, Jan Beulich wrote:
>>>>> On 13.02.17 at 15:32, <andrew.cooper3@xxxxxxxxxx> wrote:
>>> Xen's choice of the MSR_STAR value is constant across all pcpus.  Introduce 
>>> a
>>> new define and use it to avoid the opencoding in subarch_percpu_traps_init()
>>> and restore_rest_processor_state().
>>>
>>> Despite Intel hardware having an MSR_CSTAR register, nothing actually uses 
>>> it
>>> as the SYSCALL instruction raises #UD out of 64bit mode, meaning that
>> Did you mean "32-bit"?
> 
> SYSCALL on Intel will #UD if CS.L == 0, so you can't even use it from a
> compatability mode segment.

Right - so my comment stands. Or did you mean "outside of 64-bit
mode"?

Jan


_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
https://lists.xen.org/xen-devel

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.