Re: [Xen-devel] [PATCH 14/19] x86/vmx: expose LMCE feature via guest MSR_IA32_FEATURE_CONTROL

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 17.02.17 at 07:39, <haozhong.zhang@xxxxxxxxx> wrote:
> --- a/xen/arch/x86/cpu/mcheck/mce_intel.c
> +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
> @@ -916,3 +916,7 @@ int vmce_intel_rdmsr(const struct vcpu *v, uint32_t msr, 
> uint64_t *val)
>      return 1;
>  }
>  
> +bool vmce_support_lmce(const struct vcpu *v)
> +{
> +    return !!(v->arch.vmce.mcg_cap & MCG_LMCE_P);

No need for !! here.

> @@ -2634,6 +2635,9 @@ static int is_last_branch_msr(u32 ecx)
>  
>  static int vmx_msr_read_intercept(unsigned int msr, uint64_t *msr_content)
>  {
> +    struct vcpu *v = current;

curr please.

> +    struct domain *d = v->domain;

No need for this local variable afaics.

> @@ -2651,6 +2655,12 @@ static int vmx_msr_read_intercept(unsigned int msr, 
> uint64_t *msr_content)
>          __vmread(GUEST_IA32_DEBUGCTL, msr_content);
>          break;
>      case MSR_IA32_FEATURE_CONTROL:
> +        *msr_content = IA32_FEATURE_CONTROL_LOCK;
> +        if ( vmce_support_lmce(v) )
> +            *msr_content |= IA32_FEATURE_CONTROL_LMCE_ON;
> +        if ( nestedhvm_enabled(d) && d->arch.cpuid->basic.vmx )

Doesn't the right side false imply the left side to be false?

Jan


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